Lines Matching +full:0 +full:x00000000 +full:- +full:0 +full:x07ffffff
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x7.dtsi - Device Tree Include file for Microchip SAM9X7 SoC family
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
17 #include <dt-bindings/pinctrl/at91.h>
22 #address-cells = <1>;
23 #size-cells = <1>;
24 interrupt-parent = <&aic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
38 cpu@0 {
39 compatible = "arm,arm926ej-s";
40 reg = <0>;
46 slow_xtal: clock-slowxtal {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
51 main_xtal: clock-mainxtal {
52 compatible = "fixed-clock";
53 #clock-cells = <0>;
58 compatible = "mmio-sram";
59 reg = <0x300000 0x10000>;
60 ranges = <0 0x300000 0x10000>;
61 #address-cells = <1>;
62 #size-cells = <1>;
66 compatible = "simple-bus";
68 #address-cells = <1>;
69 #size-cells = <1>;
72 compatible = "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci";
73 reg = <0x80000000 0x300>;
74 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
76 clock-names = "hclock", "multclk";
77 assigned-clocks = <&pmc PMC_TYPE_GCK 12>;
78 assigned-clock-rates = <100000000>;
83 compatible = "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci";
84 reg = <0x90000000 0x300>;
85 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
87 clock-names = "hclock", "multclk";
88 assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
89 assigned-clock-rates = <100000000>;
95 compatible = "simple-bus";
97 #address-cells = <1>;
98 #size-cells = <1>;
101 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
102 reg = <0xf0000000 0x200>;
103 ranges = <0x0 0xf0000000 0x800>;
104 #address-cells = <1>;
105 #size-cells = <1>;
110 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
111 reg = <0x200 0x200>;
114 clock-names = "usart";
116 (AT91_XDMAC_DT_MEM_IF(0) |
120 (AT91_XDMAC_DT_MEM_IF(0) |
123 dma-names = "tx", "rx";
124 atmel,use-dma-rx;
125 atmel,use-dma-tx;
126 atmel,fifo-size = <16>;
127 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
132 compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
133 reg = <0x400 0x200>;
135 #address-cells = <1>;
136 #size-cells = <0>;
138 clock-names = "spi_clk";
140 (AT91_XDMAC_DT_MEM_IF(0) |
144 (AT91_XDMAC_DT_MEM_IF(0) |
147 dma-names = "tx", "rx";
148 atmel,fifo-size = <16>;
153 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
154 reg = <0x600 0x200>;
156 #address-cells = <1>;
157 #size-cells = <0>;
160 (AT91_XDMAC_DT_MEM_IF(0) |
164 (AT91_XDMAC_DT_MEM_IF(0) |
167 dma-names = "tx", "rx";
168 atmel,fifo-size = <16>;
174 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
175 reg = <0xf0004000 0x200>;
176 ranges = <0x0 0xf0004000 0x800>;
177 #address-cells = <1>;
178 #size-cells = <1>;
183 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
184 reg = <0x200 0x200>;
187 clock-names = "usart";
189 (AT91_XDMAC_DT_MEM_IF(0) |
193 (AT91_XDMAC_DT_MEM_IF(0) |
196 dma-names = "tx", "rx";
197 atmel,use-dma-rx;
198 atmel,use-dma-tx;
199 atmel,fifo-size = <16>;
200 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
205 compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
206 reg = <0x400 0x200>;
208 #address-cells = <1>;
209 #size-cells = <0>;
211 clock-names = "spi_clk";
213 (AT91_XDMAC_DT_MEM_IF(0) |
217 (AT91_XDMAC_DT_MEM_IF(0) |
220 dma-names = "tx", "rx";
221 atmel,fifo-size = <16>;
226 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
227 reg = <0x600 0x200>;
229 #address-cells = <1>;
230 #size-cells = <0>;
233 (AT91_XDMAC_DT_MEM_IF(0) |
237 (AT91_XDMAC_DT_MEM_IF(0) |
240 dma-names = "tx", "rx";
241 atmel,fifo-size = <16>;
246 dma0: dma-controller@f0008000 {
247 compatible = "microchip,sam9x7-dma", "atmel,sama5d4-dma";
248 reg = <0xf0008000 0x1000>;
249 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
250 #dma-cells = <1>;
252 clock-names = "dma_clk";
257 compatible = "microchip,sam9x7-ssc", "atmel,at91sam9g45-ssc";
258 reg = <0xf0010000 0x4000>;
261 clock-names = "pclk";
263 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
266 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
268 dma-names = "tx", "rx";
273 compatible = "microchip,sam9x7-i2smcc", "microchip,sam9x60-i2smcc";
274 reg = <0xf001c000 0x100>;
277 clock-names = "pclk", "gclk";
279 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
282 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
284 dma-names = "tx", "rx";
289 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
290 reg = <0xf0020000 0x200>;
291 ranges = <0x0 0xf0020000 0x800>;
292 #address-cells = <1>;
293 #size-cells = <1>;
298 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
299 reg = <0x200 0x200>;
302 clock-names = "usart";
304 (AT91_XDMAC_DT_MEM_IF(0) |
308 (AT91_XDMAC_DT_MEM_IF(0) |
311 dma-names = "tx", "rx";
312 atmel,use-dma-rx;
313 atmel,use-dma-tx;
314 atmel,fifo-size = <16>;
315 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
320 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
321 reg = <0x600 0x200>;
323 #address-cells = <1>;
324 #size-cells = <0>;
327 (AT91_XDMAC_DT_MEM_IF(0) |
331 (AT91_XDMAC_DT_MEM_IF(0) |
334 dma-names = "tx", "rx";
335 atmel,fifo-size = <16>;
341 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
342 reg = <0xf0024000 0x200>;
343 ranges = <0x0 0xf0024000 0x800>;
344 #address-cells = <1>;
345 #size-cells = <1>;
350 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
351 reg = <0x200 0x200>;
354 clock-names = "usart";
356 (AT91_XDMAC_DT_MEM_IF(0) |
360 (AT91_XDMAC_DT_MEM_IF(0) |
363 dma-names = "tx", "rx";
364 atmel,use-dma-rx;
365 atmel,use-dma-tx;
366 atmel,fifo-size = <16>;
367 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
372 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
373 reg = <0x600 0x200>;
375 #address-cells = <1>;
376 #size-cells = <0>;
379 (AT91_XDMAC_DT_MEM_IF(0) |
383 (AT91_XDMAC_DT_MEM_IF(0) |
386 dma-names = "tx", "rx";
387 atmel,fifo-size = <16>;
393 compatible = "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b";
394 reg = <0xf0028000 0x100>;
397 clock-names = "pclk", "gclk";
401 compatible = "microchip,sam9x7-sha", "atmel,at91sam9g46-sha";
402 reg = <0xf002c000 0x100>;
403 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
405 clock-names = "sha_clk";
407 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
409 dma-names = "tx";
413 compatible = "microchip,sam9x7-trng", "microchip,sam9x60-trng";
414 reg = <0xf0030000 0x100>;
415 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 0>;
421 compatible = "microchip,sam9x7-aes", "atmel,at91sam9g46-aes";
422 reg = <0xf0034000 0x100>;
423 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 0>;
425 clock-names = "aes_clk";
427 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
430 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
432 dma-names = "tx", "rx";
436 compatible = "microchip,sam9x7-tdes", "atmel,at91sam9g46-tdes";
437 reg = <0xf0038000 0x100>;
438 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
440 clock-names = "tdes_clk";
442 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
445 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
447 dma-names = "tx", "rx";
451 compatible = "microchip,sam9x7-classd", "atmel,sama5d2-classd";
452 reg = <0xf003c000 0x100>;
455 clock-names = "pclk", "gclk";
457 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
459 dma-names = "tx";
464 compatible = "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b";
465 reg = <0xf0040000 0x100>;
468 clock-names = "pclk", "gclk";
473 reg = <0xf8000000 0x100>, <0x300000 0x7800>;
474 reg-names = "m_can", "message_ram";
475 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>,
476 <68 IRQ_TYPE_LEVEL_HIGH 0>;
477 interrupt-names = "int0", "int1";
479 clock-names = "hclk", "cclk";
480 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 29>;
481 assigned-clock-rates = <480000000>, <40000000>;
482 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
483 bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
489 reg = <0xf8004000 0x100>, <0x300000 0xbc00>;
490 reg-names = "m_can", "message_ram";
491 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>,
492 <69 IRQ_TYPE_LEVEL_HIGH 0>;
493 interrupt-names = "int0", "int1";
495 clock-names = "hclk", "cclk";
496 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
497 assigned-clock-rates = <480000000>, <40000000>;
498 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
499 bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
504 compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";
505 reg = <0xf8008000 0x100>;
506 #address-cells = <1>;
507 #size-cells = <0>;
508 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
509 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_GCK 17>, <&clk32k 0>;
510 clock-names = "t0_clk", "gclk", "slow_clk";
514 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
515 reg = <0xf8010000 0x200>;
516 ranges = <0x0 0xf8010000 0x800>;
517 #address-cells = <1>;
518 #size-cells = <1>;
523 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
524 reg = <0x200 0x200>;
527 clock-names = "usart";
529 (AT91_XDMAC_DT_MEM_IF(0) |
533 (AT91_XDMAC_DT_MEM_IF(0) |
536 dma-names = "tx", "rx";
537 atmel,use-dma-rx;
538 atmel,use-dma-tx;
539 atmel,fifo-size = <16>;
540 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
545 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
546 reg = <0x600 0x200>;
548 #address-cells = <1>;
549 #size-cells = <0>;
552 (AT91_XDMAC_DT_MEM_IF(0) |
556 (AT91_XDMAC_DT_MEM_IF(0) |
559 dma-names = "tx", "rx";
560 atmel,fifo-size = <16>;
566 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
567 reg = <0xf8014000 0x200>;
568 ranges = <0x0 0xf8014000 0x800>;
569 #address-cells = <1>;
570 #size-cells = <1>;
575 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
576 reg = <0x200 0x200>;
579 clock-names = "usart";
581 (AT91_XDMAC_DT_MEM_IF(0) |
585 (AT91_XDMAC_DT_MEM_IF(0) |
588 dma-names = "tx", "rx";
589 atmel,use-dma-rx;
590 atmel,use-dma-tx;
591 atmel,fifo-size = <16>;
592 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
597 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
598 reg = <0x600 0x200>;
600 #address-cells = <1>;
601 #size-cells = <0>;
604 (AT91_XDMAC_DT_MEM_IF(0) |
608 (AT91_XDMAC_DT_MEM_IF(0) |
611 dma-names = "tx", "rx";
612 atmel,fifo-size = <16>;
618 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
619 reg = <0xf8018000 0x200>;
620 ranges = <0x0 0xf8018000 0x800>;
621 #address-cells = <1>;
622 #size-cells = <1>;
627 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
628 reg = <0x200 0x200>;
631 clock-names = "usart";
633 (AT91_XDMAC_DT_MEM_IF(0) |
637 (AT91_XDMAC_DT_MEM_IF(0) |
640 dma-names = "tx", "rx";
641 atmel,use-dma-rx;
642 atmel,use-dma-tx;
643 atmel,fifo-size = <16>;
644 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
649 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
650 reg = <0x600 0x200>;
652 #address-cells = <1>;
653 #size-cells = <0>;
656 (AT91_XDMAC_DT_MEM_IF(0) |
660 (AT91_XDMAC_DT_MEM_IF(0) |
663 dma-names = "tx", "rx";
664 atmel,fifo-size = <16>;
670 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
671 reg = <0xf801c000 0x200>;
672 ranges = <0x0 0xf801c000 0x800>;
673 #address-cells = <1>;
674 #size-cells = <1>;
679 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
680 reg = <0x200 0x200>;
683 clock-names = "usart";
685 (AT91_XDMAC_DT_MEM_IF(0) |
687 AT91_XDMAC_DT_PERID(0))>,
689 (AT91_XDMAC_DT_MEM_IF(0) |
692 dma-names = "tx", "rx";
693 atmel,use-dma-rx;
694 atmel,use-dma-tx;
695 atmel,fifo-size = <16>;
696 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
701 compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
702 reg = <0x400 0x200>;
704 #address-cells = <1>;
705 #size-cells = <0>;
707 clock-names = "spi_clk";
709 (AT91_XDMAC_DT_MEM_IF(0) |
711 AT91_XDMAC_DT_PERID(0))>,
713 (AT91_XDMAC_DT_MEM_IF(0) |
716 dma-names = "tx", "rx";
717 atmel,fifo-size = <16>;
722 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
723 reg = <0x600 0x200>;
725 #address-cells = <1>;
726 #size-cells = <0>;
729 (AT91_XDMAC_DT_MEM_IF(0) |
731 AT91_XDMAC_DT_PERID(0))>,
733 (AT91_XDMAC_DT_MEM_IF(0) |
736 dma-names = "tx", "rx";
737 atmel,fifo-size = <16>;
743 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
744 reg = <0xf8020000 0x200>;
745 ranges = <0x0 0xf8020000 0x800>;
746 #address-cells = <1>;
747 #size-cells = <1>;
752 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
753 reg = <0x200 0x200>;
756 clock-names = "usart";
758 (AT91_XDMAC_DT_MEM_IF(0) |
762 (AT91_XDMAC_DT_MEM_IF(0) |
765 dma-names = "tx", "rx";
766 atmel,use-dma-rx;
767 atmel,use-dma-tx;
768 atmel,fifo-size = <16>;
769 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
774 compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
775 reg = <0x400 0x200>;
777 #address-cells = <1>;
778 #size-cells = <0>;
780 clock-names = "spi_clk";
782 (AT91_XDMAC_DT_MEM_IF(0) |
786 (AT91_XDMAC_DT_MEM_IF(0) |
789 dma-names = "tx", "rx";
790 atmel,fifo-size = <16>;
795 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
796 reg = <0x600 0x200>;
798 #address-cells = <1>;
799 #size-cells = <0>;
802 (AT91_XDMAC_DT_MEM_IF(0) |
806 (AT91_XDMAC_DT_MEM_IF(0) |
809 dma-names = "tx", "rx";
810 atmel,fifo-size = <16>;
816 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
817 reg = <0xf8024000 0x200>;
818 ranges = <0x0 0xf8024000 0x800>;
819 #address-cells = <1>;
820 #size-cells = <1>;
825 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
826 reg = <0x200 0x200>;
829 clock-names = "usart";
831 (AT91_XDMAC_DT_MEM_IF(0) |
835 (AT91_XDMAC_DT_MEM_IF(0) |
838 dma-names = "tx", "rx";
839 atmel,use-dma-rx;
840 atmel,use-dma-tx;
841 atmel,fifo-size = <16>;
842 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
847 compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
848 reg = <0x400 0x200>;
850 #address-cells = <1>;
851 #size-cells = <0>;
853 clock-names = "spi_clk";
855 (AT91_XDMAC_DT_MEM_IF(0) |
859 (AT91_XDMAC_DT_MEM_IF(0) |
862 dma-names = "tx", "rx";
863 atmel,fifo-size = <16>;
868 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
869 reg = <0x600 0x200>;
871 #address-cells = <1>;
872 #size-cells = <0>;
875 (AT91_XDMAC_DT_MEM_IF(0) |
879 (AT91_XDMAC_DT_MEM_IF(0) |
882 dma-names = "tx", "rx";
883 atmel,fifo-size = <16>;
889 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
890 reg = <0xf8028000 0x200>;
891 ranges = <0x0 0xf8028000 0x800>;
892 #address-cells = <1>;
893 #size-cells = <1>;
898 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
899 reg = <0x200 0x200>;
902 clock-names = "usart";
904 (AT91_XDMAC_DT_MEM_IF(0) |
908 (AT91_XDMAC_DT_MEM_IF(0) |
911 dma-names = "tx", "rx";
912 atmel,use-dma-rx;
913 atmel,use-dma-tx;
914 atmel,fifo-size = <16>;
915 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
920 compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
921 reg = <0x400 0x200>;
923 #address-cells = <1>;
924 #size-cells = <0>;
926 clock-names = "spi_clk";
928 (AT91_XDMAC_DT_MEM_IF(0) |
932 (AT91_XDMAC_DT_MEM_IF(0) |
935 dma-names = "tx", "rx";
936 atmel,fifo-size = <16>;
941 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
942 reg = <0x600 0x200>;
944 #address-cells = <1>;
945 #size-cells = <0>;
948 (AT91_XDMAC_DT_MEM_IF(0) |
952 (AT91_XDMAC_DT_MEM_IF(0) |
955 dma-names = "tx", "rx";
956 atmel,fifo-size = <16>;
962 compatible = "microchip,sam9x7-gem", "microchip,sama7g5-gem";
963 reg = <0xf802c000 0x1000>;
964 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 0 */
971 clock-names = "hclk", "pclk", "tx_clk", "tsu_clk";
972 assigned-clocks = <&pmc PMC_TYPE_GCK 67>;
973 assigned-clock-rates = <266666666>;
978 compatible = "microchip,sam9x7-pwm", "microchip,sam9x60-pwm";
979 reg = <0xf8034000 0x300>;
982 #pwm-cells = <3>;
987 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
988 reg = <0xf8040000 0x200>;
989 ranges = <0x0 0xf8040000 0x800>;
990 #address-cells = <1>;
991 #size-cells = <1>;
996 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
997 reg = <0x200 0x200>;
1000 clock-names = "usart";
1002 (AT91_XDMAC_DT_MEM_IF(0) |
1006 (AT91_XDMAC_DT_MEM_IF(0) |
1009 dma-names = "tx", "rx";
1010 atmel,use-dma-rx;
1011 atmel,use-dma-tx;
1012 atmel,fifo-size = <16>;
1013 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
1018 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
1019 reg = <0x600 0x200>;
1021 #address-cells = <1>;
1022 #size-cells = <0>;
1025 (AT91_XDMAC_DT_MEM_IF(0) |
1029 (AT91_XDMAC_DT_MEM_IF(0) |
1032 dma-names = "tx", "rx";
1033 atmel,fifo-size = <16>;
1039 compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
1040 reg = <0xf8044000 0x200>;
1041 ranges = <0x0 0xf8044000 0x800>;
1042 #address-cells = <1>;
1043 #size-cells = <1>;
1048 compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
1049 reg = <0x200 0x200>;
1052 clock-names = "usart";
1054 (AT91_XDMAC_DT_MEM_IF(0) |
1058 (AT91_XDMAC_DT_MEM_IF(0) |
1061 dma-names = "tx", "rx";
1062 atmel,use-dma-rx;
1063 atmel,use-dma-tx;
1064 atmel,fifo-size = <16>;
1065 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
1070 compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
1071 reg = <0x600 0x200>;
1073 #address-cells = <1>;
1074 #size-cells = <0>;
1077 (AT91_XDMAC_DT_MEM_IF(0) |
1081 (AT91_XDMAC_DT_MEM_IF(0) |
1084 dma-names = "tx", "rx";
1085 atmel,fifo-size = <16>;
1091 compatible = "microchip,sam9x7-matrix", "atmel,at91sam9x5-matrix", "syscon";
1092 reg = <0xffffde00 0x200>;
1095 pmecc: ecc-engine@ffffe000 {
1096 compatible = "microchip,sam9x7-pmecc", "atmel,at91sam9g45-pmecc";
1097 reg = <0xffffe000 0x300>, <0xffffe600 0x100>;
1101 compatible = "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc";
1102 reg = <0xffffe800 0x200>;
1104 clock-names = "ddrck", "mpddr";
1108 compatible = "microchip,sam9x7-smc", "atmel,at91sam9260-smc", "syscon";
1109 reg = <0xffffea00 0x100>;
1112 aic: interrupt-controller@fffff100 {
1113 compatible = "microchip,sam9x7-aic";
1114 reg = <0xfffff100 0x100>;
1115 #interrupt-cells = <3>;
1116 interrupt-controller;
1117 atmel,external-irqs = <31>;
1121 …compatible = "microchip,sam9x7-dbgu", "atmel,at91sam9260-dbgu", "microchip,sam9x7-usart", "atmel,a…
1122 reg = <0xfffff200 0x200>;
1125 clock-names = "usart";
1127 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1130 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1132 dma-names = "tx", "rx";
1133 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
1138 compatible = "microchip,sam9x7-pinctrl", "microchip,sam9x60-pinctrl", "simple-mfd";
1139 ranges = <0xfffff400 0xfffff400 0x800>;
1140 #address-cells = <1>;
1141 #size-cells = <1>;
1143 /* mux-mask corresponding to sam9x7 SoC in TFBGA228L package */
1144 atmel,mux-mask = <
1146 0xffffffff 0xffffefc0 0xc0ffd000 0x00000000 /* pioA */
1147 0x07ffffff 0x0805fe7f 0x01ff9f81 0x06078000 /* pioB */
1148 0xffffffff 0x07dfffff 0xfa3fffff 0x00000000 /* pioC */
1149 0x00003fff 0x00003fe0 0x0000003f 0x00000000 /* pioD */
1153 compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
1154 reg = <0xfffff400 0x200>;
1156 #interrupt-cells = <2>;
1157 interrupt-controller;
1158 #gpio-cells = <2>;
1159 gpio-controller;
1164 compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
1165 reg = <0xfffff600 0x200>;
1167 #interrupt-cells = <2>;
1168 interrupt-controller;
1169 #gpio-cells = <2>;
1170 gpio-controller;
1171 #gpio-lines = <26>;
1176 compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
1177 reg = <0xfffff800 0x200>;
1179 #interrupt-cells = <2>;
1180 interrupt-controller;
1181 #gpio-cells = <2>;
1182 gpio-controller;
1187 compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
1188 reg = <0xfffffa00 0x200>;
1190 #interrupt-cells = <2>;
1191 interrupt-controller;
1192 #gpio-cells = <2>;
1193 gpio-controller;
1194 #gpio-lines = <22>;
1199 pmc: clock-controller@fffffc00 {
1200 compatible = "microchip,sam9x7-pmc", "syscon";
1201 reg = <0xfffffc00 0x200>;
1203 #clock-cells = <2>;
1204 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
1205 clock-names = "td_slck", "md_slck", "main_xtal";
1208 reset_controller: reset-controller@fffffe00 {
1209 compatible = "microchip,sam9x7-rstc", "microchip,sam9x60-rstc";
1210 reg = <0xfffffe00 0x10>;
1211 clocks = <&clk32k 0>;
1215 compatible = "microchip,sam9x7-shdwc", "microchip,sam9x60-shdwc";
1216 reg = <0xfffffe10 0x10>;
1217 #address-cells = <1>;
1218 #size-cells = <0>;
1219 clocks = <&clk32k 0>;
1220 atmel,wakeup-rtc-timer;
1221 atmel,wakeup-rtt-timer;
1226 compatible = "microchip,sam9x7-rtt", "atmel,at91sam9260-rtt";
1227 reg = <0xfffffe20 0x20>;
1229 clocks = <&clk32k 0>;
1232 clk32k: clock-controller@fffffe50 {
1233 compatible = "microchip,sam9x7-sckc", "microchip,sam9x60-sckc";
1234 reg = <0xfffffe50 0x4>;
1236 #clock-cells = <1>;
1240 compatible = "microchip,sam9x7-gpbr", "atmel,at91sam9260-gpbr", "syscon";
1241 reg = <0xfffffe60 0x10>;
1245 compatible = "microchip,sam9x7-rtc", "microchip,sam9x60-rtc";
1246 reg = <0xfffffea8 0x100>;
1248 clocks = <&clk32k 0>;
1252 compatible = "microchip,sam9x7-wdt", "microchip,sam9x60-wdt";
1253 reg = <0xffffff80 0x24>;