Lines Matching +full:mdio +full:- +full:gpios
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
30 compatible = "arm,cortex-a7";
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
36 L2_0: l2-cache0 {
38 cache-level = <2>;
39 cache-unified;
44 compatible = "arm,armv7-timer";
49 arm,cpu-registers-not-fw-configured;
53 compatible = "arm,cortex-a7-pmu";
56 interrupt-affinity = <&CA7_0>, <&CA7_1>;
60 periph_clk: periph-clk {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <200000000>;
66 hsspi_pll: hsspi-pll {
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
69 clock-frequency = <400000000>;
74 compatible = "arm,psci-0.2";
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <1>;
84 gic: interrupt-controller@1000 {
85 compatible = "arm,cortex-a7-gic";
86 #interrupt-cells = <3>;
87 interrupt-controller;
97 compatible = "simple-bus";
98 #address-cells = <1>;
99 #size-cells = <1>;
103 compatible = "brcm,bcm6345-wdt";
107 /* GPIOs 0 .. 31 */
109 compatible = "brcm,bcm6345-gpio";
111 reg-names = "dirout", "dat";
112 gpio-controller;
113 #gpio-cells = <2>;
117 /* GPIOs 32 .. 63 */
119 compatible = "brcm,bcm6345-gpio";
121 reg-names = "dirout", "dat";
122 gpio-controller;
123 #gpio-cells = <2>;
127 /* GPIOs 64 .. 95 */
129 compatible = "brcm,bcm6345-gpio";
131 reg-names = "dirout", "dat";
132 gpio-controller;
133 #gpio-cells = <2>;
137 /* GPIOs 96 .. 127 */
139 compatible = "brcm,bcm6345-gpio";
141 reg-names = "dirout", "dat";
142 gpio-controller;
143 #gpio-cells = <2>;
147 /* GPIOs 128 .. 159 */
149 compatible = "brcm,bcm6345-gpio";
151 reg-names = "dirout", "dat";
152 gpio-controller;
153 #gpio-cells = <2>;
157 /* GPIOs 160 .. 191 */
159 compatible = "brcm,bcm6345-gpio";
161 reg-names = "dirout", "dat";
162 gpio-controller;
163 #gpio-cells = <2>;
167 /* GPIOs 192 .. 223 */
169 compatible = "brcm,bcm6345-gpio";
171 reg-names = "dirout", "dat";
172 gpio-controller;
173 #gpio-cells = <2>;
177 /* GPIOs 224 .. 255 */
179 compatible = "brcm,bcm6345-gpio";
181 reg-names = "dirout", "dat";
182 gpio-controller;
183 #gpio-cells = <2>;
188 compatible = "brcm,bcm6345-uart";
192 clock-names = "refclk";
197 compatible = "brcm,iproc-rng200";
201 leds: led-controller@800 {
202 #address-cells = <1>;
203 #size-cells = <0>;
204 compatible = "brcm,bcm63138-leds";
210 #address-cells = <1>;
211 #size-cells = <0>;
212 compatible = "brcm,bcm6846-hsspi", "brcm,bcmbca-hsspi-v1.0";
216 clock-names = "hsspi", "pll";
217 num-cs = <8>;
221 nand_controller: nand-controller@1800 {
222 #address-cells = <1>;
223 #size-cells = <0>;
224 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
226 reg-names = "nand", "nand-int-base";
235 mdio: mdio@2060 { label
236 compatible = "brcm,bcm6846-mdio";
238 reg-names = "mdio", "mdio_indir_rw";
239 #address-cells = <1>;
240 #size-cells = <0>;
244 pl081_dma: dma-controller@59000 {
247 arm,primecell-periphid = <0x00041081>;
250 memcpy-burst-size = <256>;
251 memcpy-bus-width = <32>;
253 clock-names = "apb_pclk";
254 #dma-cells = <2>;