Lines Matching +full:0 +full:x400
175 reg = <0x80000000 0x40000000>;
184 reg = <0xb3d00000 0x100000>;
190 reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */
191 record-size = <0x8000>;
192 console-size = <0x8000>;
193 ftrace-size = <0x8000>;
194 pmsg-size = <0x8000>;
200 reg = <0xb4000000 0x04000000>; /* 64M */
207 reg = <0xbf000000 0x01000000>; /* 16M */
246 gpios = <&gpio0 ASPEED_GPIO(H, 0) GPIO_ACTIVE_LOW>;
280 pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
330 reg = <0x51>;
335 reg = <0x62>;
337 #size-cells = <0>;
361 reg = <0x63>;
363 #size-cells = <0>;
400 reg = <0x54>;
405 reg = <0x68>;
410 reg = <0x69>;
415 reg = <0x6b>;
420 reg = <0x6d>;
429 reg = <0x65>;
431 #size-cells = <0>;
450 reg = <0x70>;
452 #size-cells = <0>;
455 i2c4mux0chn0: i2c@0 {
456 reg = <0>;
458 #size-cells = <0>;
462 reg = <0x52>;
467 reg = <0x62>;
469 #size-cells = <0>;
473 led@0 {
474 reg = <0>;
494 #size-cells = <0>;
498 reg = <0x50>;
503 reg = <0x60>;
505 #size-cells = <0>;
509 led@0 {
510 reg = <0>;
530 #size-cells = <0>;
534 reg = <0x51>;
539 reg = <0x61>;
541 #size-cells = <0>;
545 led@0 {
546 reg = <0>;
570 reg = <0x66>;
572 #size-cells = <0>;
593 reg = <0x70>;
595 #size-cells = <0>;
598 i2c5mux0chn0: i2c@0 {
599 reg = <0>;
601 #size-cells = <0>;
605 reg = <0x50>;
610 reg = <0x60>;
612 #size-cells = <0>;
616 led@0 {
617 reg = <0>;
637 #size-cells = <0>;
641 reg = <0x51>;
646 reg = <0x61>;
648 #size-cells = <0>;
652 led@0 {
653 reg = <0>;
673 #size-cells = <0>;
677 reg = <0x52>;
682 reg = <0x62>;
684 #size-cells = <0>;
688 led@0 {
689 reg = <0>;
709 #size-cells = <0>;
713 reg = <0x53>;
718 reg = <0x63>;
720 #size-cells = <0>;
724 led@0 {
725 reg = <0>;
749 reg = <0x70>;
751 #size-cells = <0>;
754 i2c6mux0chn0: i2c@0 {
755 reg = <0>;
757 #size-cells = <0>;
761 reg = <0x50>;
766 reg = <0x60>;
768 #size-cells = <0>;
772 led@0 {
773 reg = <0>;
793 #size-cells = <0>;
797 reg = <0x52>;
802 reg = <0x62>;
804 #size-cells = <0>;
808 led@0 {
809 reg = <0>;
829 #size-cells = <0>;
833 reg = <0x53>;
838 reg = <0x63>;
840 #size-cells = <0>;
844 led@0 {
845 reg = <0>;
865 #size-cells = <0>;
869 reg = <0x51>;
874 reg = <0x61>;
876 #size-cells = <0>;
880 led@0 {
881 reg = <0>;
901 reg = <0x65>;
903 #size-cells = <0>;
1002 reg = <0x31>;
1004 #size-cells = <0>;
1008 led@0 {
1009 reg = <0>;
1139 reg = <0x32>;
1141 #size-cells = <0>;
1145 led@0 {
1146 reg = <0>;
1276 reg = <0x33>;
1278 #size-cells = <0>;
1282 led@0 {
1283 reg = <0>;
1413 reg = <0x30>;
1415 #size-cells = <0>;
1419 led@0 {
1420 reg = <0>;
1550 reg = <0x34>;
1552 #size-cells = <0>;
1556 led@0 {
1557 reg = <0>;
1679 reg = <0x35>;
1681 #size-cells = <0>;
1685 led@0 {
1686 reg = <0>;
1812 reg = <0x11>;
1817 reg = <0x32>;
1822 reg = <0x51>;
1827 reg = <0x50>;
1832 reg = <0x70>;
1834 #size-cells = <0>;
1838 i2c8mux0chn0: i2c@0 {
1839 reg = <0>;
1841 #size-cells = <0>;
1847 #size-cells = <0>;
1857 reg = <0x50>;
1862 reg = <0x51>;
1867 reg = <0x53>;
1872 reg = <0x52>;
1881 reg = <0x51>;
1886 reg = <0x50>;
1891 reg = <0x53>;
1896 reg = <0x52>;
1905 reg = <0x51>;
1910 reg = <0x50>;
1915 reg = <0x53>;
1920 reg = <0x52>;
1929 reg = <0x2e>;
1939 reg = <0x51>;
1944 reg = <0x50>;
1949 reg = <0x53>;
1954 reg = <0x52>;
1964 reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
1969 reg = <0x70>;
1971 #size-cells = <0>;
1974 i2c14mux0chn0: i2c@0 {
1975 reg = <0>;
1977 #size-cells = <0>;
1981 reg = <0x50>;
1988 #size-cells = <0>;
1992 reg = <0x51>;
1999 #size-cells = <0>;
2003 reg = <0x50>;
2008 reg = <0x60>;
2010 #size-cells = <0>;
2014 led@0 {
2015 reg = <0>;
2051 #size-cells = <0>;
2055 reg = <0x52>;
2057 #size-cells = <0>;
2062 reg = <0x60>;
2064 #size-cells = <0>;
2068 led@0 {
2069 reg = <0>;
2184 #size-cells = <0>;
2185 reg = <0x61>;
2203 reg = <0x71>;
2205 #size-cells = <0>;
2208 i2c14mux1chn0: i2c@0 {
2209 reg = <0>;
2211 #size-cells = <0>;
2215 reg = <0x50>;
2222 #size-cells = <0>;
2226 reg = <0x50>;
2233 #size-cells = <0>;
2237 reg = <0x50>;
2244 #size-cells = <0>;
2248 reg = <0x50>;
2259 reg = <0x70>;
2261 #size-cells = <0>;
2264 i2c15mux0chn0: i2c@0 {
2265 reg = <0>;
2267 #size-cells = <0>;
2271 reg = <0x53>;
2278 #size-cells = <0>;
2282 reg = <0x53>;
2289 #size-cells = <0>;
2293 reg = <0x53>;
2300 #size-cells = <0>;
2304 reg = <0x53>;
2311 reg = <0x71>;
2313 #size-cells = <0>;
2316 i2c15mux1chn0: i2c@0 {
2317 reg = <0>;
2319 #size-cells = <0>;
2323 reg = <0x53>;
2330 #size-cells = <0>;
2334 reg = <0x53>;
2341 #size-cells = <0>;
2345 reg = <0x53>;
2352 #size-cells = <0>;
2356 reg = <0x53>;
2363 reg = <0x72>;
2365 #size-cells = <0>;
2368 i2c15mux2chn0: i2c@0 {
2369 reg = <0>;
2371 #size-cells = <0>;
2375 reg = <0x53>;
2382 #size-cells = <0>;
2386 reg = <0x53>;
2393 #size-cells = <0>;
2399 #size-cells = <0>;
2453 pinctrl-0 = <&pinctrl_rmii3_default>;
2463 pinctrl-0 = <&pinctrl_rmii4_default>;
2477 pinctrl-0 = <&pinctrl_wdtrst1_default>;
2486 aspeed,lpc-io-reg = <0xca8 0xcac>;
2491 aspeed,lpc-io-reg = <0xca2>;
2496 cfam@4,0 { /* DCM2_C0 */
2497 reg = <4 0>;
2504 reg = <0x1000 0x400>;
2509 reg = <0x1800 0x400>;
2511 #size-cells = <0>;
2513 cfam4_i2c0: i2c-bus@0 {
2514 reg = <0>; /* OM01 */
2516 #size-cells = <0>;
2520 reg = <0x20>;
2522 #size-cells = <0>;
2524 cfam@0,0 {
2525 reg = <0 0>;
2528 chip-id = <0>;
2532 reg = <0x1000 0x400>;
2537 reg = <0x2400 0x400>;
2546 #size-cells = <0>;
2550 reg = <0x20>;
2552 #size-cells = <0>;
2554 cfam@0,0 {
2555 reg = <0 0>;
2558 chip-id = <0>;
2562 reg = <0x1000 0x400>;
2567 reg = <0x2400 0x400>;
2576 #size-cells = <0>;
2580 reg = <0x20>;
2582 #size-cells = <0>;
2584 cfam@0,0 {
2585 reg = <0 0>;
2588 chip-id = <0>;
2592 reg = <0x1000 0x400>;
2597 reg = <0x2400 0x400>;
2606 #size-cells = <0>;
2610 reg = <0x20>;
2612 #size-cells = <0>;
2614 cfam@0,0 {
2615 reg = <0 0>;
2618 chip-id = <0>;
2622 reg = <0x1000 0x400>;
2627 reg = <0x2400 0x400>;
2636 #size-cells = <0>;
2640 reg = <0x20>;
2642 #size-cells = <0>;
2644 cfam@0,0 {
2645 reg = <0 0>;
2648 chip-id = <0>;
2652 reg = <0x1000 0x400>;
2657 reg = <0x2400 0x400>;
2666 #size-cells = <0>;
2670 reg = <0x20>;
2672 #size-cells = <0>;
2674 cfam@0,0 {
2675 reg = <0 0>;
2678 chip-id = <0>;
2682 reg = <0x1000 0x400>;
2687 reg = <0x2400 0x400>;
2696 #size-cells = <0>;
2700 reg = <0x20>;
2702 #size-cells = <0>;
2704 cfam@0,0 {
2705 reg = <0 0>;
2708 chip-id = <0>;
2712 reg = <0x1000 0x400>;
2717 reg = <0x2400 0x400>;
2726 #size-cells = <0>;
2730 reg = <0x20>;
2732 #size-cells = <0>;
2734 cfam@0,0 {
2735 reg = <0 0>;
2738 chip-id = <0>;
2742 reg = <0x1000 0x400>;
2747 reg = <0x2400 0x400>;
2756 reg = <0x1c00 0x400>;
2758 #size-cells = <0>;
2760 cfam4_spi0: spi@0 {
2762 reg = <0x0>;
2764 #size-cells = <0>;
2766 eeprom@0 {
2768 reg = <0>;
2771 size = <0x80000>;
2778 reg = <0x20>;
2780 #size-cells = <0>;
2782 eeprom@0 {
2784 reg = <0>;
2787 size = <0x80000>;
2794 reg = <0x40>;
2796 #size-cells = <0>;
2798 eeprom@0 {
2800 reg = <0>;
2803 size = <0x80000>;
2810 reg = <0x60>;
2812 #size-cells = <0>;
2814 eeprom@0 {
2816 reg = <0>;
2819 size = <0x80000>;
2827 reg = <0x2400 0x400>;
2841 reg = <0x3400 0x400>;
2843 #size-cells = <0>;
2848 cfam@5,0 { /* DCM2_C1 */
2849 reg = <5 0>;
2856 reg = <0x1000 0x400>;
2861 reg = <0x1800 0x400>;
2863 #size-cells = <0>;
2868 #size-cells = <0>;
2872 reg = <0x20>;
2874 #size-cells = <0>;
2876 cfam@0,0 {
2877 reg = <0 0>;
2880 chip-id = <0>;
2884 reg = <0x1000 0x400>;
2889 reg = <0x2400 0x400>;
2898 #size-cells = <0>;
2902 reg = <0x20>;
2904 #size-cells = <0>;
2906 cfam@0,0 {
2907 reg = <0 0>;
2910 chip-id = <0>;
2914 reg = <0x1000 0x400>;
2919 reg = <0x2400 0x400>;
2928 #size-cells = <0>;
2932 reg = <0x20>;
2934 #size-cells = <0>;
2936 cfam@0,0 {
2937 reg = <0 0>;
2940 chip-id = <0>;
2944 reg = <0x1000 0x400>;
2949 reg = <0x2400 0x400>;
2958 #size-cells = <0>;
2962 reg = <0x20>;
2964 #size-cells = <0>;
2966 cfam@0,0 {
2967 reg = <0 0>;
2970 chip-id = <0>;
2974 reg = <0x1000 0x400>;
2979 reg = <0x2400 0x400>;
2988 #size-cells = <0>;
2992 reg = <0x20>;
2994 #size-cells = <0>;
2996 cfam@0,0 {
2997 reg = <0 0>;
3000 chip-id = <0>;
3004 reg = <0x1000 0x400>;
3009 reg = <0x2400 0x400>;
3018 #size-cells = <0>;
3022 reg = <0x20>;
3024 #size-cells = <0>;
3026 cfam@0,0 {
3027 reg = <0 0>;
3030 chip-id = <0>;
3034 reg = <0x1000 0x400>;
3039 reg = <0x2400 0x400>;
3048 #size-cells = <0>;
3052 reg = <0x20>;
3054 #size-cells = <0>;
3056 cfam@0,0 {
3057 reg = <0 0>;
3060 chip-id = <0>;
3064 reg = <0x1000 0x400>;
3069 reg = <0x2400 0x400>;
3078 #size-cells = <0>;
3082 reg = <0x20>;
3084 #size-cells = <0>;
3086 cfam@0,0 {
3087 reg = <0 0>;
3090 chip-id = <0>;
3094 reg = <0x1000 0x400>;
3099 reg = <0x2400 0x400>;
3108 reg = <0x1c00 0x400>;
3110 #size-cells = <0>;
3112 cfam5_spi0: spi@0 {
3114 reg = <0x0>;
3116 #size-cells = <0>;
3118 eeprom@0 {
3120 reg = <0>;
3123 size = <0x80000>;
3130 reg = <0x20>;
3132 #size-cells = <0>;
3134 eeprom@0 {
3136 reg = <0>;
3139 size = <0x80000>;
3146 reg = <0x40>;
3148 #size-cells = <0>;
3150 eeprom@0 {
3152 reg = <0>;
3155 size = <0x80000>;
3162 reg = <0x60>;
3164 #size-cells = <0>;
3166 eeprom@0 {
3168 reg = <0>;
3171 size = <0x80000>;
3179 reg = <0x2400 0x400>;
3193 reg = <0x3400 0x400>;
3195 #size-cells = <0>;
3200 cfam@6,0 { /* DCM3_C0 */
3201 reg = <6 0>;
3208 reg = <0x1000 0x400>;
3213 reg = <0x1800 0x400>;
3215 #size-cells = <0>;
3217 cfam6_i2c0: i2c-bus@0 {
3218 reg = <0>; /* OM01 */
3220 #size-cells = <0>;
3224 reg = <0x20>;
3226 #size-cells = <0>;
3228 cfam@0,0 {
3229 reg = <0 0>;
3232 chip-id = <0>;
3236 reg = <0x1000 0x400>;
3241 reg = <0x2400 0x400>;
3250 #size-cells = <0>;
3254 reg = <0x20>;
3256 #size-cells = <0>;
3258 cfam@0,0 {
3259 reg = <0 0>;
3262 chip-id = <0>;
3266 reg = <0x1000 0x400>;
3271 reg = <0x2400 0x400>;
3280 #size-cells = <0>;
3284 reg = <0x20>;
3286 #size-cells = <0>;
3288 cfam@0,0 {
3289 reg = <0 0>;
3292 chip-id = <0>;
3296 reg = <0x1000 0x400>;
3301 reg = <0x2400 0x400>;
3310 #size-cells = <0>;
3314 reg = <0x20>;
3316 #size-cells = <0>;
3318 cfam@0,0 {
3319 reg = <0 0>;
3322 chip-id = <0>;
3326 reg = <0x1000 0x400>;
3331 reg = <0x2400 0x400>;
3340 #size-cells = <0>;
3344 reg = <0x20>;
3346 #size-cells = <0>;
3348 cfam@0,0 {
3349 reg = <0 0>;
3352 chip-id = <0>;
3356 reg = <0x1000 0x400>;
3361 reg = <0x2400 0x400>;
3370 #size-cells = <0>;
3374 reg = <0x20>;
3376 #size-cells = <0>;
3378 cfam@0,0 {
3379 reg = <0 0>;
3382 chip-id = <0>;
3386 reg = <0x1000 0x400>;
3391 reg = <0x2400 0x400>;
3400 #size-cells = <0>;
3404 reg = <0x20>;
3406 #size-cells = <0>;
3408 cfam@0,0 {
3409 reg = <0 0>;
3412 chip-id = <0>;
3416 reg = <0x1000 0x400>;
3421 reg = <0x2400 0x400>;
3430 #size-cells = <0>;
3434 reg = <0x20>;
3436 #size-cells = <0>;
3438 cfam@0,0 {
3439 reg = <0 0>;
3442 chip-id = <0>;
3446 reg = <0x1000 0x400>;
3451 reg = <0x2400 0x400>;
3460 reg = <0x1c00 0x400>;
3462 #size-cells = <0>;
3464 cfam6_spi0: spi@0 {
3466 reg = <0x0>;
3468 #size-cells = <0>;
3470 eeprom@0 {
3472 reg = <0>;
3475 size = <0x80000>;
3482 reg = <0x20>;
3484 #size-cells = <0>;
3486 eeprom@0 {
3488 reg = <0>;
3491 size = <0x80000>;
3498 reg = <0x40>;
3500 #size-cells = <0>;
3502 eeprom@0 {
3504 reg = <0>;
3507 size = <0x80000>;
3514 reg = <0x60>;
3516 #size-cells = <0>;
3518 eeprom@0 {
3520 reg = <0>;
3523 size = <0x80000>;
3531 reg = <0x2400 0x400>;
3545 reg = <0x3400 0x400>;
3547 #size-cells = <0>;
3552 cfam@7,0 { /* DCM3_C1 */
3553 reg = <7 0>;
3560 reg = <0x1000 0x400>;
3565 reg = <0x1800 0x400>;
3567 #size-cells = <0>;
3572 #size-cells = <0>;
3576 reg = <0x20>;
3578 #size-cells = <0>;
3580 cfam@0,0 {
3581 reg = <0 0>;
3584 chip-id = <0>;
3588 reg = <0x1000 0x400>;
3593 reg = <0x2400 0x400>;
3602 #size-cells = <0>;
3606 reg = <0x20>;
3608 #size-cells = <0>;
3610 cfam@0,0 {
3611 reg = <0 0>;
3614 chip-id = <0>;
3618 reg = <0x1000 0x400>;
3623 reg = <0x2400 0x400>;
3632 #size-cells = <0>;
3636 reg = <0x20>;
3638 #size-cells = <0>;
3640 cfam@0,0 {
3641 reg = <0 0>;
3644 chip-id = <0>;
3648 reg = <0x1000 0x400>;
3653 reg = <0x2400 0x400>;
3662 #size-cells = <0>;
3666 reg = <0x20>;
3668 #size-cells = <0>;
3670 cfam@0,0 {
3671 reg = <0 0>;
3674 chip-id = <0>;
3678 reg = <0x1000 0x400>;
3683 reg = <0x2400 0x400>;
3692 #size-cells = <0>;
3696 reg = <0x20>;
3698 #size-cells = <0>;
3700 cfam@0,0 {
3701 reg = <0 0>;
3704 chip-id = <0>;
3708 reg = <0x1000 0x400>;
3713 reg = <0x2400 0x400>;
3722 #size-cells = <0>;
3726 reg = <0x20>;
3728 #size-cells = <0>;
3730 cfam@0,0 {
3731 reg = <0 0>;
3734 chip-id = <0>;
3738 reg = <0x1000 0x400>;
3743 reg = <0x2400 0x400>;
3752 #size-cells = <0>;
3756 reg = <0x20>;
3758 #size-cells = <0>;
3760 cfam@0,0 {
3761 reg = <0 0>;
3764 chip-id = <0>;
3768 reg = <0x1000 0x400>;
3773 reg = <0x2400 0x400>;
3782 #size-cells = <0>;
3786 reg = <0x20>;
3788 #size-cells = <0>;
3790 cfam@0,0 {
3791 reg = <0 0>;
3794 chip-id = <0>;
3798 reg = <0x1000 0x400>;
3803 reg = <0x2400 0x400>;
3812 reg = <0x1c00 0x400>;
3814 #size-cells = <0>;
3816 cfam7_spi0: spi@0 {
3818 reg = <0x0>;
3820 #size-cells = <0>;
3822 eeprom@0 {
3824 reg = <0>;
3827 size = <0x80000>;
3834 reg = <0x20>;
3836 #size-cells = <0>;
3838 eeprom@0 {
3840 reg = <0>;
3843 size = <0x80000>;
3850 reg = <0x40>;
3852 #size-cells = <0>;
3854 eeprom@0 {
3856 reg = <0>;
3859 size = <0x80000>;
3866 reg = <0x60>;
3868 #size-cells = <0>;
3870 eeprom@0 {
3872 reg = <0>;
3875 size = <0x80000>;
3883 reg = <0x2400 0x400>;
3897 reg = <0x3400 0x400>;
3899 #size-cells = <0>;