Lines Matching full:uart0
129 bool "Kernel low-level debugging messages via Alpine UART0"
146 0x80000000 | 0xf0000000 | UART0
246 bool "Kernel low-level debugging on BCMBCA UART0"
521 bool "Kernel low-level debugging on KEYSTONE2 using UART0"
526 their output to UART0 serial port on KEYSTONE2 devices.
537 bool "Kernel low-level debugging via LPC18xx/43xx UART0"
542 on NXP LPC18xx/43xx UART0.
576 bool "Kernel low-level debugging messages via MVEBU UART0 (old bootloaders)"
582 on MVEBU based platforms on UART0.
600 bool "Kernel low-level debugging messages via MVEBU UART0 (new bootloaders)"
605 on MVEBU based platforms on UART0. (Armada XP, Armada 3xx,
643 bool "Mediatek mt6589 UART0"
648 for Mediatek mt6589 based platforms on UART0.
651 bool "Mediatek mt8127/mt6592 UART0"
656 for Mediatek mt8127 based platforms on UART0.
826 bool "Kernel low-level debugging messages via Rockchip RV1108 UART0"
850 bool "Kernel low-level debugging messages via Rockchip RK29 UART0"
874 bool "Kernel low-level debugging messages via Rockchip RK30/RK31 UART0"
1069 bool "Use SOCFPGA UART0 for low-level debug"
1092 bool "Kernel low-level debugging messages via sun9i UART0"
1097 on Allwinner A80 based platforms on the UART0.
1100 bool "Kernel low-level debugging messages via sunXi UART0"
1105 on Allwinner A1X based platforms on the UART0.
1285 bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
1290 choose the relevant UART0 base address.
1296 bool "Use PL011 UART0 at 0x10009000 (V2P-CA9 core tile)"
1300 This option selects UART0 at 0x10009000. Except for custom models,
1304 bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"
1308 This option selects UART0 at 0x1c090000. This applies to most
1313 bool "Use PL011 UART0 at 0xb0090000 (Cortex-R compliant tiles)"
1317 This option selects UART0 at 0xb0090000. This is appropriate for
1328 bool "Use UART0 on VIA/Wondermedia SoCs"
1331 This option selects UART0 on VIA/Wondermedia System-on-a-chip
1335 bool "Kernel low-level debugging on Xilinx Zynq using UART0"
1339 their output to UART0 on the Zynq platform.