Lines Matching +full:bank +full:- +full:ioport
1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/ioport.h>
93 /* This only causes re-entry to ARCSBIOS */ in ruffian_kill_arch()
105 * 21052 13 - - - -
106 * SIO 14 23 - - -
107 * 21143 15 44 - - -
117 * 53c875 13 (23) 20 - - -
126 {-1, -1, -1, -1, -1}, /* IdSel 13, 21052 */ in ruffian_map_irq()
127 {-1, -1, -1, -1, -1}, /* IdSel 14, SIO */ in ruffian_map_irq()
129 {-1, -1, -1, -1, -1}, /* IdSel 16, none */ in ruffian_map_irq()
130 {43, 43, 42, 41, 40}, /* IdSel 17, 64-bit slot */ in ruffian_map_irq()
148 if (dev->bus->number == 0) { in ruffian_swizzle()
149 slot = PCI_SLOT(dev->devfn); in ruffian_swizzle()
151 /* Check for the built-in bridge. */ in ruffian_swizzle()
152 else if (PCI_SLOT(dev->bus->self->devfn) == 13) { in ruffian_swizzle()
153 slot = PCI_SLOT(dev->devfn) + 10; in ruffian_swizzle()
157 /* Must be a card-based bridge. */ in ruffian_swizzle()
159 if (PCI_SLOT(dev->bus->self->devfn) == 13) { in ruffian_swizzle()
160 slot = PCI_SLOT(dev->devfn) + 10; in ruffian_swizzle()
166 dev = dev->bus->self; in ruffian_swizzle()
168 slot = PCI_SLOT(dev->devfn); in ruffian_swizzle()
169 } while (dev->bus->self); in ruffian_swizzle()
179 * the Bank Configuration Registers in PYXIS to obtain the size.
184 unsigned long bank_addr, bank, ret = 0; in ruffian_get_bank_size() local
189 bank = *(vulp)bank_addr; in ruffian_get_bank_size()
192 if (bank & 0x01) { in ruffian_get_bank_size()
205 bank = (bank & 0x1e) >> 1; in ruffian_get_bank_size()
206 if (bank < ARRAY_SIZE(size)) in ruffian_get_bank_size()
207 ret = size[bank]; in ruffian_get_bank_size()