Lines Matching +full:config +full:- +full:space

10     Addresses scanned: none, address read from Super I/O config space
18     Addresses scanned: none, address read from Super I/O config space
26     Addresses scanned: none, address read from Super I/O config space
34     Addresses scanned: none, address read from Super I/O config space
42     Addresses scanned: none, address read from Super I/O config space
50     Addresses scanned: none, address read from Super I/O config space
58     Addresses scanned: none, address read from Super I/O config space
66     Addresses scanned: none, address read from Super I/O config space
74     Addresses scanned: none, address read from Super I/O config space
82     Addresses scanned: none, address read from Super I/O config space
90     Addresses scanned: none, address read from Super I/O config space
98     Addresses scanned: none, address read from Super I/O config space
103 	  This is the 64-pin variant of the F71889FG, they have the
111     Addresses scanned: none, address read from Super I/O config space
119 -----------
133 ----------
136 interface as documented in sysfs-interface, without any exceptions.
140 -----------
142 Both PWM (pulse-width modulation) and DC fan speed control methods are
149 vica versa. So the temperature zone trip points 1-4 (or 1-2) go from high temp
154 voltage) mode, where 0-100% duty cycle (0-100% of 12V) is specified. And RPM
156 gets specified as 0-100% of the fan#_full_speed file.
158 Since both modes work in a 0-100% (mapped to 0-255) scale, there isn't a
160 important difference is that in RPM mode the 0-100% controls the fan speed
161 between 0-100% of fan#_full_speed. It is assumed that if the BIOS programs
166 Switching between these modes requires re-initializing a whole bunch of
184   The number and type of trip points are chip dependent - see the available