Lines Matching +full:pch +full:- +full:msi +full:- +full:1
1 .. SPDX-License-Identifier: GPL-2.0
7 Touch Host Controller is the name of the IP block in PCH that interface with Touch Devices (ex:
10 - A natively half-duplex Quad I/O capable SPI master
11 - Low latency I2C interface to support HIDI2C compliant devices
12 - A HW sequencer with RW DMA capability to system memory
25 1. Overview
29 -------------------------------
31 Below diagram illustrates the high-level architecture of THC software/hardware stack, which is fully
36 ----------------------------------------------
37 | +-----------------------------------+ |
39 | +-----------------------------------+ |
40 | +-----------------------------------+ |
41 | | HID Multi-touch Driver | |
42 | +-----------------------------------+ |
43 | +-----------------------------------+ |
45 | +-----------------------------------+ |
46 | +-----------------------------------+ |
48 | +-----------------------------------+ |
49 | +-----------------------------------+ |
51 | +-----------------------------------+ |
52 | +----------------+ +----------------+ |
54 | +----------------+ +----------------+ |
55 ----------------------------------------------
56 ----------------------------------------------
57 | +-----------------------------------+ |
59 | +-----------------------------------+ |
60 | +-----------------------------------+ |
62 | +-----------------------------------+ |
63 | +-----------------------------------+ |
65 | +-----------------------------------+ |
66 ----------------------------------------------
72 THC Host Controller, which is a PCI device HBA (host bus adapter), integrated into the PCH, that
79 low-level driver that manages the THC Controller and implements HIDSPI/HIDI2C protocol.
83 ------------------------
86 ---------------------------------
88 | +---------------------------+ |
90 | +---------------------------+ |
91 | +---------------------------+ |
93 | +---------------------------+ |
94 +---------------+ | +------------+ +------------+ |
95 | System Memory +---+--+ DMA | | PIO | |
96 +---------------+ | +------------+ +------------+ |
97 | +---------------------------+ |
99 | +---------------------------+ |
100 | +------------+ +------------+ |
103 | +------------+ +------------+ |
104 ---------------------------------
133 ------------------
141 --------------------
145 2.2.1 SPI Port
164 | --------------------THC sends---------------------------------|
169 | ---------THC Sends---------------||-----Touch IC sends--------|
195 ----------
223 Here are the THC pre-defined opcodes for I2C mode:
228 0x12 Read I2C SubIP APB internal registers 0h - FFh
229 0x13 Write I2C SubIP APB internal registers 0h - FFh
236 -------
240 I/O operations, driver should pre-program PIO control registers and PIO data registers and kick
262 - Program read/write data size in THC_SS_BC.
263 - Program I/O target address in THC_SW_SEQ_DATA0_ADDR.
264 - If write, program the write data in THC_SW_SEQ_DATA0..THC_SW_SEQ_DATAn.
265 - Program the PIO opcode in THC_SS_CMD.
266 - Set TSSGO = 1 to start the PIO write sequence.
267 - If THC_SS_CD_IE = 1, SW will receives a MSI when the PIO is completed.
268 - If read, read out the data in THC_SW_SEQ_DATA0..THC_SW_SEQ_DATAn.
271 -------
275 3.3.1 Read DMA Channel
278 THC has two Read DMA engines: 1st RxDMA (RxDMA1) and 2nd RxDMA (RxDMA2). RxDMA1 is reserved for
283 software, THC will start auto-handling receiving logic.
289 RxDMA PRD table read pointer, then trigger a MSI interrupt to notify driver RxDMA finishing
296 input report data. After that, THC update RxDMA PRD table read pointer, then trigger a MSI interrupt
310 Before software starts a SW RxDMA, it shall stop the 1st and 2nd RxDMA, clear PRD read/write pointer
311 and quiesce the device interrupt (THC_DEVINT_QUIESCE_HW_STS = 1), other operations are the same with
328 -------
332 3.4.1 PRD table and entry
344 ------------------------ -------------- --------------
345 | PRD table base address +----+ PRD table #1 +-----+ PRD Entry #1 |
346 ------------------------ -------------- --------------
347 --------------
349 --------------
350 --------------
352 --------------
360 To simplify the design, SW assumes worst-case memory fragmentation. Therefore,each PRD table shall
362 number of PRD-entries per PRD table.
367 Max OS memory fragmentation will be at a 4KB boundary, thus to address 1MB of virtually contiguous
417 PRD table can describe 1M bytes memory.
419 .. code-block:: c
437 --------------
439 - Call ACPI _RST method to reset Touch IC device.
440 - Read the reset response from TIC through PIO read.
441 - Issue a command to retrieve device descriptor from Touch IC through PIO write.
442 - Read the device descriptor from Touch IC through PIO read.
443 - If the device descriptor is valid, allocate DMA buffers and configure all DMA channels.
444 - Issue a command to retrieve report descriptor from Touch IC through DMA.
447 --------------------------
451 - Touch IC interrupts the THC Controller using an in-band THC interrupt.
452 - THC Sequencer reads the input report header by transmitting read approval as a signal
454 - THC Sequencer executes a Input Report Body Read operation corresponding to the value
456 - THC DMA engine begins fetching data from the THC Sequencer and writes to host memory
460 - The THC Sequencer checks for the “Last Fragment Flag” bit in the Input Report Header.
462 - If the “Last Fragment Flag” bit is enabled the THC Sequencer enters End-of-Frame Processing.
466 - THC DMA engine increments the read pointer of the Read PRD CB, sets EOF interrupt status
468 - If THC EOF interrupt is enabled by the driver in the control register (THC_M_PRT_READ_DMA_CNTRL_2…
473 - THC QuickSPI driver checks CB write Ptr and CB read Ptr to identify if any data frame in DMA
475 - THC QuickSPI driver gets first unprocessed PRD table.
476 - THC QuickSPI driver scans all PRD entries in this PRD table to calculate the total frame size.
477 - THC QuickSPI driver copies all frame data out.
478 - THC QuickSPI driver checks the data type according to input report body, and calls related
480 - THC QuickSPI driver updates write Ptr.
483 ---------------------------
487 - HID core calls raw_request callback with a request to THC QuickSPI driver.
488 - THC QuickSPI Driver converts request provided data into the output report packet and copies it
490 - Start TxDMA to complete the write operation.
496 --------------
498 - Read device descriptor from Touch IC device through PIO write followed by read.
499 - If the device descriptor is valid, allocate DMA buffers and configure all DMA channels.
500 - Use PIO or TxDMA to write a SET_POWER request to TIC's command register, and check if the
502 - Use PIO or TxDMA to write a RESET request to TIC's command register. If the write operation
504 - Use SWDMA to read report descriptor through TIC's report descriptor register.
507 --------------------------
511 - Touch IC asserts the interrupt indicating that it has an interrupt to send to HOST.
514 - THC Sequencer continues the Read operation as per the size of data indicated in the
516 - THC DMA engine begins fetching data from the THC Sequencer and writes to host memory
521 - THC Sequencer enters End-of-Input Report Processing.
522 - If the device has no more input reports to send to the host, it de-asserts the interrupt
524 steps 1 through 4 in the flow are repeated.
528 - THC DMA engine increments the read pointer of the Read PRD CB, sets EOF interrupt status
530 - If THC EOF interrupt is enabled by the driver in the control register
535 - THC QuickI2C driver checks CB write Ptr and CB read Ptr to identify if any data frame in DMA
537 - THC QuickI2C driver gets first unprocessed PRD table.
538 - THC QuickI2C driver scans all PRD entries in this PRD table to calculate the total frame size.
539 - THC QuickI2C driver copies all frame data out.
540 - THC QuickI2C driver call hid_input_report to send the input report content to HID core, which
543 - THC QuickI2C driver updates write Ptr.
546 ---------------------------
550 - HID core call THC QuickI2C raw_request callback.
551 - THC QuickI2C uses PIO or TXDMA to write a SET_REPORT request to TIC's command register. Report
553 - THC QuickI2C programs TxDMA buffer with TX Data to be written to TIC's data register. The first
562 echo 1 > /sys/kernel/debug/tracing/events/intel_thc/enable
567 - HIDSPI: https://download.microsoft.com/download/c/a/0/ca07aef3-3e10-4022-b1e9-c98cea99465d/HidSpi…
568 - HIDI2C: https://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-ov…