Lines Matching +full:dma +full:- +full:write
1 .. SPDX-License-Identifier: GPL-2.0
10 - A natively half-duplex Quad I/O capable SPI master
11 - Low latency I2C interface to support HIDI2C compliant devices
12 - A HW sequencer with RW DMA capability to system memory
16 bandwidth DMA services to the touch driver and transfers the HID report to host system main memory.
18 Hardware sequencer within the THC is responsible for transferring (via DMA) data from touch devices
20 consumption (by host) in relation to data production (by touch device via DMA).
29 -------------------------------
31 Below diagram illustrates the high-level architecture of THC software/hardware stack, which is fully
36 ----------------------------------------------
37 | +-----------------------------------+ |
39 | +-----------------------------------+ |
40 | +-----------------------------------+ |
41 | | HID Multi-touch Driver | |
42 | +-----------------------------------+ |
43 | +-----------------------------------+ |
45 | +-----------------------------------+ |
46 | +-----------------------------------+ |
48 | +-----------------------------------+ |
49 | +-----------------------------------+ |
51 | +-----------------------------------+ |
52 | +----------------+ +----------------+ |
54 | +----------------+ +----------------+ |
55 ----------------------------------------------
56 ----------------------------------------------
57 | +-----------------------------------+ |
59 | +-----------------------------------+ |
60 | +-----------------------------------+ |
62 | +-----------------------------------+ |
63 | +-----------------------------------+ |
65 | +-----------------------------------+ |
66 ----------------------------------------------
79 low-level driver that manages the THC Controller and implements HIDSPI/HIDI2C protocol.
83 ------------------------
86 ---------------------------------
88 | +---------------------------+ |
90 | +---------------------------+ |
91 | +---------------------------+ |
93 | +---------------------------+ |
94 +---------------+ | +------------+ +------------+ |
95 | System Memory +---+--+ DMA | | PIO | |
96 +---------------+ | +------------+ +------------+ |
97 | +---------------------------+ |
99 | +---------------------------+ |
100 | +------------+ +------------+ |
103 | +------------+ +------------+ |
104 ---------------------------------
110 the registers include several categories: Interrupt status and control, DMA configure,
114 THC provides two ways for driver to communicate with external Touch ICs: PIO and DMA.
115 PIO can let driver manually write/read data to/from Touch ICs, instead, THC DMA can
116 automatically write/read data without driver involved.
120 Touch ICs interrupt and start DMA receive/send data from/to Touch ICs according to interrupt
133 ------------------
141 --------------------
164 | --------------------THC sends---------------------------------|
169 | ---------THC Sends---------------||-----Touch IC sends--------|
178 value and use PIO write (by setting SubIP write opcode) to do a write operation.
195 ----------
198 read or PIO write.
200 When THC is configured to SPI mode, opcodes are used for determining the read/write IO mode.
207 0x02 Write Single I/O
209 0xB2 Write Dual I/O
211 0xE2 Write Quad I/O
220 I2C SubIP APB register read, I2C SubIP APB register write, I2C touch IC device read,
221 I2C touch IC device write, I2C touch IC device write followed by read.
223 Here are the THC pre-defined opcodes for I2C mode:
228 0x12 Read I2C SubIP APB internal registers 0h - FFh
229 0x13 Write I2C SubIP APB internal registers 0h - FFh
231 0x18 Write external Touch IC through I2C bus N/A
232 0x1C Write then read external Touch IC through I2C bus N/A
236 -------
240 I/O operations, driver should pre-program PIO control registers and PIO data registers and kick
242 operations (PIO read/write/write followed by read).
254 As DMA needs max packet size for transferring configuration, and the max packet size information
256 So PIO typical use case is, before DMA initialization, write RESET command (PIO write), read
257 RESET response (PIO read or PIO write followed by read), write Power ON command (PIO write), read
262 - Program read/write data size in THC_SS_BC.
263 - Program I/O target address in THC_SW_SEQ_DATA0_ADDR.
264 - If write, program the write data in THC_SW_SEQ_DATA0..THC_SW_SEQ_DATAn.
265 - Program the PIO opcode in THC_SS_CMD.
266 - Set TSSGO = 1 to start the PIO write sequence.
267 - If THC_SS_CD_IE = 1, SW will receives a MSI when the PIO is completed.
268 - If read, read out the data in THC_SW_SEQ_DATA0..THC_SW_SEQ_DATAn.
270 3.3 DMA
271 -------
273 THC has 4 DMA channels: Read DMA1, Read DMA2, Write DMA and Software DMA.
275 3.3.1 Read DMA Channel argument
278 THC has two Read DMA engines: 1st RxDMA (RxDMA1) and 2nd RxDMA (RxDMA2). RxDMA1 is reserved for
283 software, THC will start auto-handling receiving logic.
295 packet length, then use this packet length to start a DMA reading from input report address for
302 3.3.2 Software DMA channel argument
310 Before software starts a SW RxDMA, it shall stop the 1st and 2nd RxDMA, clear PRD read/write pointer
314 3.3.3 Write DMA Channel argument
317 THC has one write DMA engine, which can be used for sending data to Touch IC automatically.
319 before last command is completely handled, next command cannot be sent, THC write DMA engine only
322 What driver needs to do is, preparing PRD table and DMA buffer, then copy data to DMA buffer and
323 update PRD table with buffer address and buffer length, then start write DMA. THC will
324 automatically send the data to touch IC, and trigger a DMA completion interrupt once transferring
328 -------
335 In order to improve physical DMA memory usage, modern drivers trend to allocate a virtually
344 ------------------------ -------------- --------------
345 | PRD table base address +----+ PRD table #1 +-----+ PRD Entry #1 |
346 ------------------------ -------------- --------------
347 --------------
349 --------------
350 --------------
352 --------------
354 The read DMA engine supports multiple PRD tables held within a circular buffer that allow the THC
355 to support multiple data buffers from the Touch IC. This allows host SW to arm the Read DMA engine
360 To simplify the design, SW assumes worst-case memory fragmentation. Therefore,each PRD table shall
362 number of PRD-entries per PRD table.
364 SW allocates up to 128 PRD tables per Read DMA engine as specified in the THC_M_PRT_RPRD_CNTRL.PCD
374 3.4.2 PRD Write pointer and read pointer
377 As PRD tables are organized as a Circular Buffer (CB), a read pointer and a write pointer for a CB
380 DMA HW consumes the PRD tables in the CB, one PRD entry at a time until the EOP bit is found set
382 to the PRD which the DMA engine is currently processing. This pointer rolls over once the circular
383 buffer's depth has been traversed with bit[7] the Rollover bit. E.g. if the DMA CB depth is equal
387 The write pointer is updated by SW. The write pointer points to location in the DMA CB, where the
389 circular buffer's depth has been traversed with Bit[7] as the rollover bit. E.g. if the DMA CB
390 depth is equal to 5 entries (0100b), then the write pointers will follow this pattern (SW is
419 .. code-block:: c
425 In general, every PRD table means one HID touch data packet. Every DMA engine can support
426 up to 128 PRD tables (except write DMA, write DMA only has one PRD table). SW driver is responsible
437 --------------
439 - Call ACPI _RST method to reset Touch IC device.
440 - Read the reset response from TIC through PIO read.
441 - Issue a command to retrieve device descriptor from Touch IC through PIO write.
442 - Read the device descriptor from Touch IC through PIO read.
443 - If the device descriptor is valid, allocate DMA buffers and configure all DMA channels.
444 - Issue a command to retrieve report descriptor from Touch IC through DMA.
447 --------------------------
451 - Touch IC interrupts the THC Controller using an in-band THC interrupt.
452 - THC Sequencer reads the input report header by transmitting read approval as a signal
454 - THC Sequencer executes a Input Report Body Read operation corresponding to the value
456 - THC DMA engine begins fetching data from the THC Sequencer and writes to host memory
458 THC Sequencer signals all data has been read or the THC DMA Read Engine reaches the
460 - The THC Sequencer checks for the “Last Fragment Flag” bit in the Input Report Header.
462 - If the “Last Fragment Flag” bit is enabled the THC Sequencer enters End-of-Frame Processing.
466 - THC DMA engine increments the read pointer of the Read PRD CB, sets EOF interrupt status
468 - If THC EOF interrupt is enabled by the driver in the control register (THC_M_PRT_READ_DMA_CNTRL_2…
471 Sequence of steps to read data from RX DMA buffer:
473 - THC QuickSPI driver checks CB write Ptr and CB read Ptr to identify if any data frame in DMA
475 - THC QuickSPI driver gets first unprocessed PRD table.
476 - THC QuickSPI driver scans all PRD entries in this PRD table to calculate the total frame size.
477 - THC QuickSPI driver copies all frame data out.
478 - THC QuickSPI driver checks the data type according to input report body, and calls related
480 - THC QuickSPI driver updates write Ptr.
483 ---------------------------
487 - HID core calls raw_request callback with a request to THC QuickSPI driver.
488 - THC QuickSPI Driver converts request provided data into the output report packet and copies it
489 to THC's write DMA buffer.
490 - Start TxDMA to complete the write operation.
496 --------------
498 - Read device descriptor from Touch IC device through PIO write followed by read.
499 - If the device descriptor is valid, allocate DMA buffers and configure all DMA channels.
500 - Use PIO or TxDMA to write a SET_POWER request to TIC's command register, and check if the
501 write operation is successfully completed.
502 - Use PIO or TxDMA to write a RESET request to TIC's command register. If the write operation
504 - Use SWDMA to read report descriptor through TIC's report descriptor register.
507 --------------------------
511 - Touch IC asserts the interrupt indicating that it has an interrupt to send to HOST.
514 - THC Sequencer continues the Read operation as per the size of data indicated in the
516 - THC DMA engine begins fetching data from the THC Sequencer and writes to host memory
519 signals all data has been read or the THC DMA Read Engine reaches the end of it's last
521 - THC Sequencer enters End-of-Input Report Processing.
522 - If the device has no more input reports to send to the host, it de-asserts the interrupt
528 - THC DMA engine increments the read pointer of the Read PRD CB, sets EOF interrupt status
530 - If THC EOF interrupt is enabled by the driver in the control register
533 Sequence of steps to read data from RX DMA buffer:
535 - THC QuickI2C driver checks CB write Ptr and CB read Ptr to identify if any data frame in DMA
537 - THC QuickI2C driver gets first unprocessed PRD table.
538 - THC QuickI2C driver scans all PRD entries in this PRD table to calculate the total frame size.
539 - THC QuickI2C driver copies all frame data out.
540 - THC QuickI2C driver call hid_input_report to send the input report content to HID core, which
543 - THC QuickI2C driver updates write Ptr.
546 ---------------------------
550 - HID core call THC QuickI2C raw_request callback.
551 - THC QuickI2C uses PIO or TXDMA to write a SET_REPORT request to TIC's command register. Report
553 - THC QuickI2C programs TxDMA buffer with TX Data to be written to TIC's data register. The first
567 - HIDSPI: https://download.microsoft.com/download/c/a/0/ca07aef3-3e10-4022-b1e9-c98cea99465d/HidSpi…
568 - HIDI2C: https://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-ov…