Lines Matching +full:spi +full:- +full:num +full:- +full:cs
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/samsung,spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC SPI controller
10 - Krzysztof Kozlowski <[email protected]>
13 All the SPI controller nodes should be represented in the aliases node using
14 the following format 'spi{n}' where n is a unique number for the alias.
19 - enum:
20 - google,gs101-spi
21 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
22 - samsung,s3c6410-spi
23 - samsung,s5pv210-spi # for S5PV210 and S5PC110
24 - samsung,exynos4210-spi
25 - samsung,exynos5433-spi
26 - samsung,exynos850-spi
27 - samsung,exynosautov9-spi
28 - tesla,fsd-spi
29 - items:
30 - enum:
31 - samsung,exynos8895-spi
32 - const: samsung,exynos850-spi
33 - const: samsung,exynos7-spi
40 clock-names:
48 dma-names:
50 - const: tx
51 - const: rx
56 no-cs-readback:
58 The CS line is disconnected, therefore the device should not operate
59 based on CS signalling.
62 num-cs:
67 samsung,spi-src-clk:
69 If the spi controller includes a internal clock mux to select the clock
70 source for the spi bus clock, this property can be used to indicate the
71 clock to be used for driving the spi bus clock. If not specified, the
80 - compatible
81 - clocks
82 - clock-names
83 - interrupts
84 - reg
87 - $ref: spi-controller.yaml#
88 - if:
93 - samsung,exynos5433-spi
94 - samsung,exynosautov9-spi
100 clock-names:
102 - const: spi
103 - enum:
104 - spi_busclk0
105 - spi_busclk1
106 - spi_busclk2
107 - spi_busclk3
108 - const: spi_ioclk
114 clock-names:
116 - const: spi
117 - enum:
118 - spi_busclk0
119 - spi_busclk1
120 - spi_busclk2
121 - spi_busclk3
126 - |
127 #include <dt-bindings/clock/exynos5433.h>
128 #include <dt-bindings/clock/samsung,s2mps11.h>
129 #include <dt-bindings/interrupt-controller/arm-gic.h>
130 #include <dt-bindings/gpio/gpio.h>
132 spi@14d30000 {
133 compatible = "samsung,exynos5433-spi";
137 dma-names = "tx", "rx";
138 #address-cells = <1>;
139 #size-cells = <0>;
143 clock-names = "spi",
146 samsung,spi-src-clk = <0>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&spi1_bus>;
149 num-cs = <1>;
151 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
153 audio-codec@0 {
156 spi-max-frequency = <20000000>;
157 interrupt-parent = <&gpa0>;
161 clock-names = "mclk1", "mclk2";
163 gpio-controller;
164 #gpio-cells = <2>;
165 interrupt-controller;
166 #interrupt-cells = <2>;
168 wlf,micd-detect-debounce = <300>;
169 wlf,micd-bias-start-time = <0x1>;
170 wlf,micd-rate = <0x7>;
171 wlf,micd-dbtime = <0x2>;
172 wlf,micd-force-micbias;
173 wlf,micd-configs = <0x0 1 0>;
174 wlf,hpdet-channel = <1>;
182 AVDD-supply = <&ldo18_reg>;
183 DBVDD1-supply = <&ldo18_reg>;
184 CPVDD-supply = <&ldo18_reg>;
185 DBVDD2-supply = <&ldo18_reg>;
186 DBVDD3-supply = <&ldo18_reg>;
187 SPKVDDL-supply = <&ldo18_reg>;
188 SPKVDDR-supply = <&ldo18_reg>;
190 controller-data {
191 samsung,spi-feedback-delay = <0>;