Lines Matching +full:protocol +full:- +full:node
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <[email protected]>
11 - Krzysztof Kozlowski <[email protected]>
14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
15 USI shares almost all internal circuits within each protocol, so only one
16 protocol can be chosen at a time. USI is modeled as a node with zero or more
17 child nodes, each representing a serial sub-node device. The mode setting
22 pattern: "^usi@[0-9a-f]+$"
26 - items:
27 - enum:
28 - google,gs101-usi
29 - samsung,exynosautov9-usi
30 - samsung,exynosautov920-usi
31 - const: samsung,exynos850-usi
32 - enum:
33 - samsung,exynos850-usi
41 clock-names:
43 - const: pclk
44 - const: ipclk
48 "#address-cells":
51 "#size-cells":
55 $ref: /schemas/types.yaml#/definitions/phandle-array
57 - items:
58 - description: phandle to System Register syscon node
59 - description: offset of SW_CONF register for this USI controller
61 Should be phandle/offset pair. The phandle to System Register syscon node
69 Selects USI function (which serial protocol to use). Refer to
70 <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
72 samsung,clkreq-on:
75 Enable this property if underlying protocol requires the clock to be
78 multi-master mode. Usually this property is needed if USI mode is set
84 "^i2c@[0-9a-f]+$":
85 $ref: /schemas/i2c/i2c-exynos5.yaml
86 description: Child node describing underlying I2C
88 "^serial@[0-9a-f]+$":
90 description: Child node describing underlying UART/serial
92 "^spi@[0-9a-f]+$":
94 description: Child node describing underlying SPI
97 - compatible
98 - ranges
99 - "#address-cells"
100 - "#size-cells"
101 - samsung,sysreg
102 - samsung,mode
109 - samsung,exynos850-usi
118 - description: Bus (APB) clock
119 - description: Operating clock for UART/SPI/I2C protocol
121 clock-names:
125 - reg
126 - clocks
127 - clock-names
133 clock-names: false
134 samsung,clkreq-on: false
139 - |
140 #include <dt-bindings/interrupt-controller/arm-gic.h>
141 #include <dt-bindings/soc/samsung,exynos-usi.h>
144 compatible = "samsung,exynos850-usi";
148 samsung,clkreq-on; /* needed for UART mode */
149 #address-cells = <1>;
150 #size-cells = <1>;
153 clock-names = "pclk", "ipclk";
156 compatible = "samsung,exynos850-uart";
160 clock-names = "uart", "clk_uart_baud0";
165 compatible = "samsung,exynos850-hsi2c", "samsung,exynosautov9-hsi2c";
168 #address-cells = <1>;
169 #size-cells = <0>;
171 clock-names = "hsi2c", "hsi2c_pclk";