Lines Matching +full:anatop +full:- +full:enable +full:- +full:bit
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ANATOP register
10 - Shawn Guo <[email protected]>
11 - Sascha Hauer <[email protected]>
16 - items:
17 - enum:
18 - fsl,imx6sl-anatop
19 - fsl,imx6sll-anatop
20 - fsl,imx6sx-anatop
21 - fsl,imx6ul-anatop
22 - fsl,imx7d-anatop
23 - const: fsl,imx6q-anatop
24 - const: syscon
25 - const: simple-mfd
26 - items:
27 - const: fsl,imx6q-anatop
28 - const: syscon
29 - const: simple-mfd
36 - description: Temperature sensor event
37 - description: Brown-out event on either of the support regulators
38 - description: Brown-out event on either the core, gpu or soc regulators
44 $ref: /schemas/thermal/imx-thermal.yaml
47 "regulator-((1p1)|(2p5)|(3p0)|(vdd1p0d)|(vdd1p2)|(vddcore)|(vddpcie)|(vddpu)|(vddsoc))$":
50 $ref: /schemas/regulator/anatop-regulator.yaml
53 - compatible
54 - reg
57 - if:
62 - fsl,imx7d-anatop
76 - |
77 #include <dt-bindings/clock/imx6ul-clock.h>
78 #include <dt-bindings/interrupt-controller/arm-gic.h>
80 anatop: anatop@20c8000 {
81 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
82 "syscon", "simple-mfd";
88 reg_3p0: regulator-3p0 {
89 compatible = "fsl,anatop-regulator";
90 regulator-name = "vdd3p0";
91 regulator-min-microvolt = <2625000>;
92 regulator-max-microvolt = <3400000>;
93 anatop-reg-offset = <0x120>;
94 anatop-vol-bit-shift = <8>;
95 anatop-vol-bit-width = <5>;
96 anatop-min-bit-val = <0>;
97 anatop-min-voltage = <2625000>;
98 anatop-max-voltage = <3400000>;
99 anatop-enable-bit = <0>;
102 reg_arm: regulator-vddcore {
103 compatible = "fsl,anatop-regulator";
104 regulator-name = "cpu";
105 regulator-min-microvolt = <725000>;
106 regulator-max-microvolt = <1450000>;
107 regulator-always-on;
108 anatop-reg-offset = <0x140>;
109 anatop-vol-bit-shift = <0>;
110 anatop-vol-bit-width = <5>;
111 anatop-delay-reg-offset = <0x170>;
112 anatop-delay-bit-shift = <24>;
113 anatop-delay-bit-width = <2>;
114 anatop-min-bit-val = <1>;
115 anatop-min-voltage = <725000>;
116 anatop-max-voltage = <1450000>;
119 reg_soc: regulator-vddsoc {
120 compatible = "fsl,anatop-regulator";
121 regulator-name = "vddsoc";
122 regulator-min-microvolt = <725000>;
123 regulator-max-microvolt = <1450000>;
124 regulator-always-on;
125 anatop-reg-offset = <0x140>;
126 anatop-vol-bit-shift = <18>;
127 anatop-vol-bit-width = <5>;
128 anatop-delay-reg-offset = <0x170>;
129 anatop-delay-bit-shift = <28>;
130 anatop-delay-bit-width = <2>;
131 anatop-min-bit-val = <1>;
132 anatop-min-voltage = <725000>;
133 anatop-max-voltage = <1450000>;
137 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
138 interrupt-parent = <&gpc>;
140 fsl,tempmon = <&anatop>;
141 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
142 nvmem-cell-names = "calib", "temp_grade";
144 #thermal-sensor-cells = <0>;