Lines Matching +full:3 +full:- +full:cell
6 typically provided by means of memory-mapped I/O registers. These registers are
22 --------------------
23 - compatible : Should be,
24 "ti,k2e-pscrst"
25 "ti,k2l-pscrst"
26 "ti,k2hk-pscrst"
27 "ti,syscon-reset"
28 - #reset-cells : Should be 1. Please see the reset consumer node below
30 - ti,reset-bits : Contains the reset control register information
33 Cell #1 : offset of the reset assert control
35 Cell #2 : bit position of the reset in the reset
37 Cell #3 : offset of the reset deassert control
39 Cell #4 : bit position of the reset in the reset
41 Cell #5 : offset of the reset status register
43 Cell #6 : bit position of the reset in the
45 Cell #7 : Flags used to control reset behavior,
47 file <dt-bindings/reset/ti-syscon.h>
55 --------------------
56 - resets : A phandle to the reset controller node and an index number
63 --------
70 psc: power-sleep-controller@2350000 {
71 compatible = "syscon", "simple-mfd";
74 pscrst: reset-controller {
75 compatible = "ti,k2e-pscrst", "ti,syscon-reset";
76 #reset-cells = <1>;
78 ti,reset-bits = <
80 0xa40 5 0xa44 3 0 0 (ASSERT_SET | DEASSERT_CLEAR | STATUS_NONE) /* 1: example */