Lines Matching +full:qcom +full:- +full:sm8250 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SM8250 TLMM block
10 - Bjorn Andersson <[email protected]>
13 Top Level Mode Multiplexer pin controller in the Qualcomm SM8250 SoC.
17 const: qcom,sm8250-pinctrl
22 reg-names:
24 - const: west
25 - const: south
26 - const: north
31 gpio-reserved-ranges:
35 gpio-line-names:
39 "-state$":
41 - $ref: "#/$defs/qcom-sm8250-tlmm-state"
42 - patternProperties:
43 "-pins$":
44 $ref: "#/$defs/qcom-sm8250-tlmm-state"
48 qcom-sm8250-tlmm-state:
53 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
63 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
64 - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
92 - pins
95 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
98 - compatible
99 - reg
100 - reg-names
105 - |
106 #include <dt-bindings/interrupt-controller/arm-gic.h>
108 compatible = "qcom,sm8250-pinctrl";
112 reg-names = "west", "south", "north";
114 gpio-controller;
115 #gpio-cells = <2>;
116 interrupt-controller;
117 #interrupt-cells = <2>;
118 gpio-ranges = <&tlmm 0 0 181>; /* GPIOs + ufs_reset */
119 wakeup-parent = <&pdc>;