Lines Matching +full:qcom +full:- +full:sm8250 +full:- +full:lpass +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8250 SoC LPASS LPI TLMM
10 - Srinivas Kandagatla <[email protected]>
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.
18 const: qcom,sm8250-lpass-lpi-pinctrl
25 - description: LPASS Core voting clock
26 - description: LPASS Audio voting clock
28 clock-names:
30 - const: core
31 - const: audio
34 "-state$":
36 - $ref: "#/$defs/qcom-sm8250-lpass-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-sm8250-lpass-state"
43 qcom-sm8250-lpass-state:
48 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
58 - pattern: "^gpio([0-9]|1[0-3])$"
73 - $ref: qcom,lpass-lpi-common.yaml#
76 - compatible
77 - reg
78 - clocks
79 - clock-names
84 - |
85 #include <dt-bindings/sound/qcom,q6afe.h>
87 compatible = "qcom,sm8250-lpass-lpi-pinctrl";
92 clock-names = "core", "audio";
93 gpio-controller;
94 #gpio-cells = <2>;
95 gpio-ranges = <&lpi_tlmm 0 0 14>;
97 wsa-swr-active-state {
98 clk-pins {
101 drive-strength = <2>;
102 slew-rate = <1>;
103 bias-disable;
106 data-pins {
109 drive-strength = <2>;
110 slew-rate = <1>;
114 tx-swr-sleep-clk-state {
117 drive-strength = <2>;
118 bias-pull-down;