Lines Matching +full:qup +full:- +full:spi0 +full:- +full:default +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8150-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <[email protected]>
11 - Krzysztof Kozlowski <[email protected]>
18 const: qcom,sm8150-pinctrl
23 reg-names:
25 - const: west
26 - const: east
27 - const: north
28 - const: south
33 gpio-reserved-ranges:
37 gpio-line-names:
41 "-state$":
43 - $ref: "#/$defs/qcom-sm8150-tlmm-state"
44 - patternProperties:
45 "-pins$":
46 $ref: "#/$defs/qcom-sm8150-tlmm-state"
50 qcom-sm8150-tlmm-state:
55 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
65 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
66 - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
99 - pins
102 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
105 - compatible
106 - reg
107 - reg-names
112 - |
113 #include <dt-bindings/interrupt-controller/arm-gic.h>
116 compatible = "qcom,sm8150-pinctrl";
121 reg-names = "west", "east", "north", "south";
123 gpio-ranges = <&tlmm 0 0 176>;
124 gpio-controller;
125 #gpio-cells = <2>;
126 interrupt-controller;
127 #interrupt-cells = <2>;
128 wakeup-parent = <&pdc>;
130 qup-spi0-default-state {
133 drive-strength = <6>;
134 bias-disable;
137 pcie1-default-state {
138 perst-pins {
141 drive-strength = <2>;
142 bias-pull-down;
145 clkreq-pins {
148 drive-strength = <2>;
149 bias-pull-up;
152 wake-pins {
155 drive-strength = <2>;
156 bias-pull-up;