Lines Matching +full:qcom +full:- +full:sm6125 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6125-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Qualcomm Technologies, Inc. SM6125 TLMM block
9 - Martin Botka <[email protected]>
12 Top Level Mode Multiplexer pin controller in Qualcomm SM6125 SoC.
15 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
19 const: qcom,sm6125-tlmm
24 reg-names:
26 - const: west
27 - const: south
28 - const: east
33 gpio-reserved-ranges: true
36 "-state$":
38 - $ref: "#/$defs/qcom-sm6125-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-sm6125-tlmm-state"
45 qcom-sm6125-tlmm-state:
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
60 - pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$"
61 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
93 - pins
96 - compatible
97 - reg
98 - reg-names
103 - |
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
106 compatible = "qcom,sm6125-tlmm";
110 reg-names = "west", "south", "east";
112 gpio-controller;
113 gpio-ranges = <&tlmm 0 0 134>;
114 #gpio-cells = <2>;
115 interrupt-controller;
116 #interrupt-cells = <2>;
118 sdc2-off-state {
119 clk-pins {
121 drive-strength = <2>;
122 bias-disable;
125 cmd-pins {
127 drive-strength = <2>;
128 bias-pull-up;
131 data-pins {
133 drive-strength = <2>;
134 bias-pull-up;