Lines Matching +full:i2s2 +full:- +full:sleep +full:- +full:clk +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <[email protected]>
18 const: qcom,sm4250-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
27 - description: LPASS Audio voting clock
29 clock-names:
31 - const: audio
34 "-state$":
36 - $ref: "#/$defs/qcom-sm4250-lpass-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-sm4250-lpass-state"
43 qcom-sm4250-lpass-state:
48 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
57 pattern: "^gpio([0-9]|1[0-9]|2[0-6])$"
72 - $ref: qcom,lpass-lpi-common.yaml#
75 - compatible
76 - reg
77 - clocks
78 - clock-names
83 - |
84 #include <dt-bindings/sound/qcom,q6afe.h>
86 compatible = "qcom,sm4250-lpass-lpi-pinctrl";
90 clock-names = "audio";
91 gpio-controller;
92 #gpio-cells = <2>;
93 gpio-ranges = <&lpi_tlmm 0 0 19>;
95 i2s2-active-state {
96 clk-pins {
99 drive-strength = <2>;
100 slew-rate = <1>;
101 bias-disable;
104 data-pins {
107 drive-strength = <2>;
108 slew-rate = <1>;
112 i2s2-sleep-clk-state {
115 drive-strength = <2>;
116 bias-pull-down;