Lines Matching +full:qcom +full:- +full:sdx75 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdx75-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SDX75 TLMM block
10 - Rohit Agarwal <[email protected]>
13 Top Level Mode Multiplexer pin controller in Qualcomm SDX75 SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sdx75-tlmm
28 gpio-reserved-ranges:
32 gpio-line-names:
36 "-state$":
38 - $ref: "#/$defs/qcom-sdx75-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-sdx75-tlmm-state"
45 qcom-sdx75-tlmm-state:
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2])$"
61 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk, sdc2_cmd, sdc2_data ]
91 - pins
94 - compatible
95 - reg
100 - |
101 #include <dt-bindings/interrupt-controller/arm-gic.h>
102 tlmm: pinctrl@f100000 {
103 compatible = "qcom,sdx75-tlmm";
105 gpio-controller;
106 #gpio-cells = <2>;
107 gpio-ranges = <&tlmm 0 0 133>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
112 gpio-wo-state {
117 uart-w-state {
118 rx-pins {
121 bias-disable;
124 tx-pins {
127 bias-disable;