Lines Matching +full:qcom +full:- +full:sa8775p +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sa8775p-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SA8775P TLMM block
10 - Bartosz Golaszewski <[email protected]>
13 Top Level Mode Multiplexer pin controller in Qualcomm SA8775P SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
21 - items:
22 - enum:
23 - qcom,sa8255p-tlmm
24 - const: qcom,sa8775p-tlmm
25 - items:
26 - const: qcom,sa8775p-tlmm
34 gpio-reserved-ranges:
38 gpio-line-names:
42 "-state$":
44 - $ref: "#/$defs/qcom-sa8775p-tlmm-state"
45 - patternProperties:
46 "-pins$":
47 $ref: "#/$defs/qcom-sa8775p-tlmm-state"
51 qcom-sa8775p-tlmm-state:
56 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
66 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-7])$"
67 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, ufs_reset ]
104 - pins
107 - compatible
108 - reg
113 - |
114 #include <dt-bindings/interrupt-controller/arm-gic.h>
116 tlmm: pinctrl@f000000 {
117 compatible = "qcom,sa8775p-tlmm";
120 gpio-controller;
121 #gpio-cells = <2>;
122 interrupt-controller;
123 #interrupt-cells = <2>;
124 gpio-ranges = <&tlmm 0 0 148>;
126 qup-uart10-state {