Lines Matching +full:qcom +full:- +full:msm8998 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8998-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8998 TLMM pin controller
10 - Bjorn Andersson <[email protected]>
11 - Krzysztof Kozlowski <[email protected]>
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8998 SoC.
18 const: qcom,msm8998-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
36 - $ref: "#/$defs/qcom-msm8998-tlmm-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-msm8998-tlmm-state"
43 qcom-msm8998-tlmm-state:
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
58 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
59 - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
105 - pins
108 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
111 - compatible
112 - reg
117 - |
118 #include <dt-bindings/interrupt-controller/arm-gic.h>
120 tlmm: pinctrl@3400000 {
121 compatible = "qcom,msm8998-pinctrl";
124 gpio-ranges = <&tlmm 0 0 150>;
125 gpio-controller;
126 #gpio-cells = <2>;
127 interrupt-controller;
128 #interrupt-cells = <2>;
129 gpio-reserved-ranges = <0 4>, <81 4>;
131 sdc2-off-state {
132 clk-pins {
134 drive-strength = <2>;
135 bias-disable;
138 cmd-pins {
140 drive-strength = <2>;
141 bias-pull-up;
144 data-pins {
146 drive-strength = <2>;
147 bias-pull-up;
151 sdc2-cd-state {
154 bias-pull-up;
155 drive-strength = <2>;