Lines Matching +full:qcom +full:- +full:msm8976 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8976-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8976 TLMM pin controller
10 - Bjorn Andersson <[email protected]>
11 - Krzysztof Kozlowski <[email protected]>
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8976 SoC.
18 const: qcom,msm8976-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
36 - $ref: "#/$defs/qcom-msm8976-tlmm-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-msm8976-tlmm-state"
43 qcom-msm8976-tlmm-state:
46 Desired pin configuration for a device or its specific state (like sleep
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
54 List of gpio pins affected by the properties specified in this state.
57 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-4])$"
58 - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
91 - pins
94 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
97 - compatible
98 - reg
103 - |
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
106 tlmm: pinctrl@1000000 {
107 compatible = "qcom,msm8976-pinctrl";
109 #gpio-cells = <2>;
110 gpio-controller;
111 gpio-ranges = <&tlmm 0 0 145>;
113 interrupt-controller;
114 #interrupt-cells = <2>;
116 blsp1-uart2-active-state {
119 drive-strength = <2>;
120 bias-disable;