Lines Matching +full:qcom +full:- +full:msm8226 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. MSM8226 TLMM block
10 - Bjorn Andersson <[email protected]>
13 Top Level Mode Multiplexer pin controller in Qualcomm MSM8226 SoC.
17 const: qcom,msm8226-pinctrl
20 description: Specifies the base address and size of the TLMM register space
26 gpio-reserved-ranges:
30 "-state$":
32 - $ref: "#/$defs/qcom-msm8226-tlmm-state"
33 - patternProperties:
34 "-pins$":
35 $ref: "#/$defs/qcom-msm8226-tlmm-state"
39 qcom-msm8226-tlmm-state:
44 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
54 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-6])$"
55 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
70 - pins
73 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
76 - compatible
77 - reg
82 - |
83 #include <dt-bindings/interrupt-controller/arm-gic.h>
85 compatible = "qcom,msm8226-pinctrl";
88 gpio-controller;
89 #gpio-cells = <2>;
90 gpio-ranges = <&msmgpio 0 0 117>;
91 interrupt-controller;
92 #interrupt-cells = <2>;
95 serial-state {
98 drive-strength = <8>;
99 bias-disable;