Lines Matching +full:qcom +full:- +full:ipq5332 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5332-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm IPQ5332 TLMM pin controller
10 - Bjorn Andersson <[email protected]>
11 - Krzysztof Kozlowski <[email protected]>
14 Top Level Mode Multiplexer pin controller in Qualcomm IPQ5332 SoC.
17 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
21 const: qcom,ipq5332-tlmm
29 gpio-reserved-ranges:
33 gpio-line-names:
37 "-state$":
39 - $ref: "#/$defs/qcom-ipq5332-tlmm-state"
40 - patternProperties:
41 "-pins$":
42 $ref: "#/$defs/qcom-ipq5332-tlmm-state"
46 qcom-ipq5332-tlmm-state:
51 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
60 pattern: "^gpio([0-9]|[1-4][0-9]|5[0-2])$"
90 - pins
93 - compatible
94 - reg
99 - |
100 #include <dt-bindings/interrupt-controller/arm-gic.h>
102 tlmm: pinctrl@1000000 {
103 compatible = "qcom,ipq5332-tlmm";
105 gpio-controller;
106 #gpio-cells = <0x2>;
107 gpio-ranges = <&tlmm 0 0 53>;
109 interrupt-controller;
110 #interrupt-cells = <0x2>;
112 serial0-state {
115 drive-strength = <8>;
116 bias-pull-up;