Lines Matching +full:qcom +full:- +full:apq8084 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,apq8084-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. APQ8084 TLMM block
10 - Bjorn Andersson <[email protected]>
13 Top Level Mode Multiplexer pin controller in Qualcomm APQ8084 SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,apq8084-pinctrl
28 gpio-reserved-ranges: true
31 "-state$":
33 - $ref: "#/$defs/qcom-apq8084-tlmm-state"
34 - patternProperties:
35 "-pins$":
36 $ref: "#/$defs/qcom-apq8084-tlmm-state"
40 qcom-apq8084-tlmm-state:
45 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
55 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-6])$"
56 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
94 - pins
97 - compatible
98 - reg
103 - |
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 tlmm: pinctrl@fd510000 {
106 compatible = "qcom,apq8084-pinctrl";
109 gpio-controller;
110 #gpio-cells = <2>;
111 gpio-ranges = <&tlmm 0 0 147>;
112 interrupt-controller;
113 #interrupt-cells = <2>;
116 uart-state {
117 rx-pins {
120 bias-pull-up;
123 tx-pins {
126 bias-disable;