Lines Matching +full:qcom +full:- +full:apq8064 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,apq8064-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. APQ8064 TLMM block
10 - Bjorn Andersson <[email protected]>
13 Top Level Mode Multiplexer pin controller in Qualcomm APQ8064 SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,apq8064-pinctrl
28 gpio-reserved-ranges: true
31 "-state$":
33 - $ref: "#/$defs/qcom-apq8064-tlmm-state"
34 - patternProperties:
35 "-pins$":
36 $ref: "#/$defs/qcom-apq8064-tlmm-state"
40 qcom-apq8064-tlmm-state:
45 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
55 - pattern: "^gpio([0-9]|[1-8][0-9])$"
56 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc3_clk, sdc3_cmd, sdc3_data ]
75 - pins
78 - compatible
79 - reg
84 - |
85 #include <dt-bindings/interrupt-controller/arm-gic.h>
86 tlmm: pinctrl@800000 {
87 compatible = "qcom,apq8064-pinctrl";
90 gpio-controller;
91 #gpio-cells = <2>;
92 gpio-ranges = <&tlmm 0 0 90>;
93 interrupt-controller;
94 #interrupt-cells = <2>;
97 uart-state {
98 rx-pins {
101 bias-pull-up;
104 tx-pins {
107 bias-disable;