Lines Matching +full:phy +full:- +full:output +full:- +full:clock
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,rk3228-hdmi-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip HDMI PHY with Innosilicon IP block
10 - Heiko Stuebner <[email protected]>
15 - rockchip,rk3228-hdmi-phy
16 - rockchip,rk3328-hdmi-phy
24 clock-names:
26 - const: sysclk
27 - const: refoclk
28 - const: refpclk
30 clock-output-names:
32 The hdmiphy output clock name, that gets fed back to the CRU.
34 "#clock-cells":
40 nvmem-cells:
42 description: A phandle + nvmem specifier for the cpu-version efuse
43 for adjustment to some frequency settings, depending on cpu-version
45 nvmem-cell-names:
47 - const: cpu-version
49 '#phy-cells':
53 - compatible
54 - reg
55 - clocks
56 - clock-names
57 - clock-output-names
58 - '#clock-cells'
59 - '#phy-cells'
62 - if:
66 const: rockchip,rk3228-hdmi-phy
72 - if:
76 const: rockchip,rk3328-hdmi-phy
80 - interrupts
85 - |
87 #include <dt-bindings/clock/rk3228-cru.h>
88 hdmi_phy: phy@12030000 {
89 compatible = "rockchip,rk3228-hdmi-phy";
91 #phy-cells = <0>;
93 clock-names = "sysclk", "refoclk", "refpclk";
94 #clock-cells = <0>;
96 clock-output-names = "hdmi_phy";