Lines Matching +full:orientation +full:- +full:switch

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Wang <frank.wang@rock-chips.com>
11 - Zhang Yubing <yubing.zhang@rock-chips.com>
16 - rockchip,rk3576-usbdp-phy
17 - rockchip,rk3588-usbdp-phy
22 "#phy-cells":
25 - PHY_TYPE_USB3
26 - PHY_TYPE_DP
32 clock-names:
34 - const: refclk
35 - const: immortal
36 - const: pclk
37 - const: utmi
42 reset-names:
44 - const: init
45 - const: cmn
46 - const: lane
47 - const: pcs_apb
48 - const: pma_apb
50 rockchip,dp-lane-mux:
51 $ref: /schemas/types.yaml#/definitions/uint32-array
57 An array of physical Type-C lanes indexes. Position of an entry
59 indicates physical Type-C lane. The supported DP lanes number are 2 or 4.
60 e.g. for 2 lanes DP lanes map, we could have "rockchip,dp-lane-mux = <2,
61 3>;", assuming DP lane0 on Type-C phy lane2, DP lane1 on Type-C phy
62 lane3. For 4 lanes DP lanes map, we could have "rockchip,dp-lane-mux =
63 <0, 1, 2, 3>;", assuming DP lane0 on Type-C phy lane0, DP lane1 on Type-C
64 phy lane1, DP lane2 on Type-C phy lane2, DP lane3 on Type-C phy lane3. If
67 rockchip,u2phy-grf:
72 rockchip,usb-grf:
77 rockchip,usbdpphy-grf:
82 rockchip,vo-grf:
88 sbu1-dc-gpios:
90 GPIO connected to the SBU1 line of the USB-C connector via a big resistor
91 (~100K) to apply a DC offset for signalling the connector orientation.
94 sbu2-dc-gpios:
96 GPIO connected to the SBU2 line of the USB-C connector via a big resistor
97 (~100K) to apply a DC offset for signalling the connector orientation.
100 orientation-switch:
101 description: Flag the port as possible handler of orientation switching
104 mode-switch:
112 handling orientation switching.
115 - compatible
116 - reg
117 - clocks
118 - clock-names
119 - resets
120 - reset-names
121 - "#phy-cells"
126 - |
127 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
128 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
131 compatible = "rockchip,rk3588-usbdp-phy";
133 #phy-cells = <1>;
138 clock-names = "refclk", "immortal", "pclk", "utmi";
144 reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
145 rockchip,u2phy-grf = <&usb2phy0_grf>;
146 rockchip,usb-grf = <&usb_grf>;
147 rockchip,usbdpphy-grf = <&usbdpphy0_grf>;
148 rockchip,vo-grf = <&vo0_grf>;