Lines Matching +full:burst +full:- +full:clk +full:- +full:enable
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/thead,th1520-gmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-HEAD TH1520 GMAC Ethernet controller
10 - Drew Fustini <[email protected]>
14 https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
17 - Compliant with IEEE802.3 Specification
18 - IEEE 1588-2008 standard for precision networked clock synchronization
19 - Supports 10/100/1000Mbps data transfer rate
20 - Supports RGMII/MII interface
21 - Preamble and start of frame data (SFD) insertion in Transmit path
22 - Preamble and SFD deletion in the Receive path
23 - Automatic CRC and pad generation options for receive frames
24 - MDIO master interface for PHY device configuration and management
27 - APB registers are used to configure clock frequency/clock enable/clock
29 - AHB registers are use to configure GMAC core (DesignWare Core part).
37 - thead,th1520-gmac
39 - compatible
42 - $ref: snps,dwmac.yaml#
47 - enum:
48 - thead,th1520-gmac
49 - const: snps,dwmac-3.70a
53 - description: DesignWare GMAC IP core registers
54 - description: GMAC APB registers
56 reg-names:
58 - const: dwmac
59 - const: apb
63 - description: GMAC main clock
64 - description: Peripheral registers interface clock
66 clock-names:
68 - const: stmmaceth
69 - const: pclk
73 - description: Combined signal for various interrupt events
75 interrupt-names:
77 - const: macirq
80 - clocks
81 - clock-names
86 - |
88 compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
90 reg-names = "dwmac", "apb";
91 clocks = <&clk 1>, <&clk 2>;
92 clock-names = "stmmaceth", "pclk";
94 interrupt-names = "macirq";
95 phy-mode = "rgmii-id";
96 snps,fixed-burst;
97 snps,axi-config = <&stmmac_axi_setup>;
99 phy-handle = <&phy0>;
102 #address-cells = <1>;
103 #size-cells = <0>;
104 compatible = "snps,dwmac-mdio";
106 phy0: ethernet-phy@0 {