Lines Matching +full:dcb +full:- +full:algorithm
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <[email protected]>
11 - Giuseppe Cavallaro <[email protected]>
12 - Jose Abreu <[email protected]>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
27 - snps,dwmac-3.70a
28 - snps,dwmac-3.710
29 - snps,dwmac-3.72a
30 - snps,dwmac-4.00
31 - snps,dwmac-4.10a
32 - snps,dwmac-4.20a
33 - snps,dwmac-5.10a
34 - snps,dwmac-5.20
35 - snps,dwxgmac
36 - snps,dwxgmac-2.10
39 - st,spear600-gmac
42 - compatible
52 - allwinner,sun7i-a20-gmac
53 - allwinner,sun8i-a83t-emac
54 - allwinner,sun8i-h3-emac
55 - allwinner,sun8i-r40-gmac
56 - allwinner,sun8i-v3s-emac
57 - allwinner,sun50i-a64-emac
58 - amlogic,meson6-dwmac
59 - amlogic,meson8b-dwmac
60 - amlogic,meson8m2-dwmac
61 - amlogic,meson-gxbb-dwmac
62 - amlogic,meson-axg-dwmac
63 - ingenic,jz4775-mac
64 - ingenic,x1000-mac
65 - ingenic,x1600-mac
66 - ingenic,x1830-mac
67 - ingenic,x2000-mac
68 - loongson,ls2k-dwmac
69 - loongson,ls7a-dwmac
70 - nxp,s32g2-dwmac
71 - qcom,qcs404-ethqos
72 - qcom,sa8775p-ethqos
73 - qcom,sc8280xp-ethqos
74 - qcom,sm8150-ethqos
75 - renesas,r9a06g032-gmac
76 - renesas,rzn1-gmac
77 - rockchip,px30-gmac
78 - rockchip,rk3128-gmac
79 - rockchip,rk3228-gmac
80 - rockchip,rk3288-gmac
81 - rockchip,rk3308-gmac
82 - rockchip,rk3328-gmac
83 - rockchip,rk3366-gmac
84 - rockchip,rk3368-gmac
85 - rockchip,rk3576-gmac
86 - rockchip,rk3588-gmac
87 - rockchip,rk3399-gmac
88 - rockchip,rv1108-gmac
89 - snps,dwmac
90 - snps,dwmac-3.40a
91 - snps,dwmac-3.50a
92 - snps,dwmac-3.610
93 - snps,dwmac-3.70a
94 - snps,dwmac-3.710
95 - snps,dwmac-3.72a
96 - snps,dwmac-4.00
97 - snps,dwmac-4.10a
98 - snps,dwmac-4.20a
99 - snps,dwmac-5.10a
100 - snps,dwmac-5.20
101 - snps,dwxgmac
102 - snps,dwxgmac-2.10
103 - starfive,jh7100-dwmac
104 - starfive,jh7110-dwmac
105 - thead,th1520-gmac
114 - description: Combined signal for various interrupt events
115 - description: The interrupt to manage the remote wake-up packet detection
116 - description: The interrupt that occurs when Rx exits the LPI state
117 - description: The interrupt that occurs when HW safety error triggered
119 interrupt-names:
122 - const: macirq
123 - enum: [eth_wake_irq, eth_lpi, sfty]
124 - enum: [eth_wake_irq, eth_lpi, sfty]
125 - enum: [eth_wake_irq, eth_lpi, sfty]
132 - description: GMAC main clock
133 - description: Peripheral registers interface clock
134 - description:
139 clock-names:
145 - stmmaceth
146 - pclk
147 - ptp_ref
152 - description: GMAC stmmaceth reset
153 - description: AHB reset
155 reset-names:
157 - items:
158 - enum: [stmmaceth, ahb]
159 - items:
160 - const: stmmaceth
161 - const: ahb
163 power-domains:
166 mac-mode:
167 $ref: ethernet-controller.yaml#/properties/phy-connection-type
169 The property is identical to 'phy-mode', and assumes that there is mode
170 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
174 snps,axi-config:
185 * snps,fb, fixed-burst
186 * snps,mb, mixed-burst
189 snps,mtl-rx-config:
193 implements the 'rx-queues-config' object described in
196 rx-queues-config:
199 snps,rx-queues-to-use:
202 snps,rx-sched-sp:
205 snps,rx-sched-wsp:
209 - if:
211 - snps,rx-sched-sp
214 snps,rx-sched-wsp: false
215 - if:
217 - snps,rx-sched-wsp
220 snps,rx-sched-sp: false
222 "^queue[0-9]$":
226 snps,dcb-algorithm:
228 description: Queue to be enabled as DCB
229 snps,avb-algorithm:
232 snps,map-to-dma-channel:
235 snps,route-avcp:
238 snps,route-ptp:
241 snps,route-dcbcp:
243 description: DCB Control Packets
244 snps,route-up:
247 snps,route-multi-broad:
251 $ref: /schemas/types.yaml#/definitions/uint32-array
255 - if:
257 - snps,dcb-algorithm
260 snps,avb-algorithm: false
261 - if:
263 - snps,avb-algorithm
266 snps,dcb-algorithm: false
267 - if:
269 - snps,route-avcp
272 snps,route-ptp: false
273 snps,route-dcbcp: false
274 snps,route-up: false
275 snps,route-multi-broad: false
276 - if:
278 - snps,route-ptp
281 snps,route-avcp: false
282 snps,route-dcbcp: false
283 snps,route-up: false
284 snps,route-multi-broad: false
285 - if:
287 - snps,route-dcbcp
290 snps,route-avcp: false
291 snps,route-ptp: false
292 snps,route-up: false
293 snps,route-multi-broad: false
294 - if:
296 - snps,route-up
299 snps,route-avcp: false
300 snps,route-ptp: false
301 snps,route-dcbcp: false
302 snps,route-multi-broad: false
303 - if:
305 - snps,route-multi-broad
308 snps,route-avcp: false
309 snps,route-ptp: false
310 snps,route-dcbcp: false
311 snps,route-up: false
315 snps,mtl-tx-config:
319 implements the 'tx-queues-config' object described in
322 tx-queues-config:
325 snps,tx-queues-to-use:
328 snps,tx-sched-wrr:
331 snps,tx-sched-wfq:
334 snps,tx-sched-dwrr:
338 - if:
340 - snps,tx-sched-wrr
343 snps,tx-sched-wfq: false
344 snps,tx-sched-dwrr: false
345 - if:
347 - snps,tx-sched-wfq
350 snps,tx-sched-wrr: false
351 snps,tx-sched-dwrr: false
352 - if:
354 - snps,tx-sched-dwrr
357 snps,tx-sched-wrr: false
358 snps,tx-sched-wfq: false
360 "^queue[0-9]$":
366 description: TX queue weight (if using a DCB weight algorithm)
367 snps,dcb-algorithm:
369 description: TX queue will be working in DCB
370 snps,avb-algorithm:
389 $ref: /schemas/types.yaml#/definitions/uint32-array
397 snps,coe-unsupported:
402 - if:
404 - snps,dcb-algorithm
407 snps,avb-algorithm: false
408 - if:
410 - snps,avb-algorithm
413 snps,dcb-algorithm: false
418 snps,reset-gpio:
424 snps,reset-active-low:
430 snps,reset-delays-us:
433 Triplet of delays. The 1st cell is reset pre-delay in micro
435 cell is reset post-delay in micro seconds.
442 Use Address-Aligned Beats
464 snps,no-pbl-x8:
470 snps,fixed-burst:
475 snps,mixed-burst:
491 snps,en-tx-lpi-clockgating:
494 Enable gating of the MAC TX clock during TX low-power mode
496 snps,multicast-filter-bins:
502 snps,perfect-filter-entries:
508 snps,ps-speed:
515 snps,clk-csr:
534 const: snps,dwmac-mdio
537 - compatible
539 stmmac-axi-config:
572 $ref: /schemas/types.yaml#/definitions/uint32-array
581 fixed-burst
586 mixed-burst
594 - compatible
595 - reg
596 - interrupts
597 - interrupt-names
598 - phy-mode
601 snps,reset-active-low: ["snps,reset-gpio"]
602 snps,reset-delays-us: ["snps,reset-gpio"]
605 - $ref: ethernet-controller.yaml#
606 - if:
612 - allwinner,sun7i-a20-gmac
613 - allwinner,sun8i-a83t-emac
614 - allwinner,sun8i-h3-emac
615 - allwinner,sun8i-r40-gmac
616 - allwinner,sun8i-v3s-emac
617 - allwinner,sun50i-a64-emac
618 - loongson,ls2k-dwmac
619 - loongson,ls7a-dwmac
620 - ingenic,jz4775-mac
621 - ingenic,x1000-mac
622 - ingenic,x1600-mac
623 - ingenic,x1830-mac
624 - ingenic,x2000-mac
625 - qcom,qcs404-ethqos
626 - qcom,sa8775p-ethqos
627 - qcom,sc8280xp-ethqos
628 - qcom,sm8150-ethqos
629 - snps,dwmac-4.00
630 - snps,dwmac-4.10a
631 - snps,dwmac-4.20a
632 - snps,dwmac-5.10a
633 - snps,dwmac-5.20
634 - snps,dwxgmac
635 - snps,dwxgmac-2.10
636 - st,spear600-gmac
645 - |
647 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
649 interrupt-parent = <&vic1>;
651 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
652 mac-address = [000000000000]; /* Filled in by U-Boot */
653 max-frame-size = <3800>;
654 phy-mode = "gmii";
655 snps,multicast-filter-bins = <256>;
656 snps,perfect-filter-entries = <128>;
657 rx-fifo-depth = <16384>;
658 tx-fifo-depth = <16384>;
660 clock-names = "stmmaceth";
661 snps,axi-config = <&stmmac_axi_setup>;
662 snps,mtl-rx-config = <&mtl_rx_setup>;
663 snps,mtl-tx-config = <&mtl_tx_setup>;
665 stmmac_axi_setup: stmmac-axi-config {
671 mtl_rx_setup: rx-queues-config {
672 snps,rx-queues-to-use = <1>;
673 snps,rx-sched-sp;
675 snps,dcb-algorithm;
676 snps,map-to-dma-channel = <0x0>;
681 mtl_tx_setup: tx-queues-config {
682 snps,tx-queues-to-use = <2>;
683 snps,tx-sched-wrr;
686 snps,dcb-algorithm;
691 snps,avb-algorithm;
701 #address-cells = <1>;
702 #size-cells = <0>;
703 compatible = "snps,dwmac-mdio";
704 phy1: ethernet-phy@0 {