Lines Matching +full:ethernet +full:- +full:pse
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/pse-pd/microchip,pd692x0.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kory Maincent <[email protected]>
13 - $ref: pse-controller.yaml#
18 - microchip,pd69200
19 - microchip,pd69210
20 - microchip,pd69220
29 List of the PD69208T4/PD69204T4/PD69208M PSE managers. Each manager
32 PD692x0 PSE controller. The PSE managers have to be described from
34 behavior of the PD692x0 PSE controller. The PD692x0 support up to
35 12 PSE managers which can expose up to 96 physical ports. All
40 "#address-cells":
43 "#size-cells":
47 - "#address-cells"
48 - "#size-cells"
51 "^manager@[0-9a-b]$":
55 PD69208T4/PD69204T4/PD69208M PSE manager exposing 4 or 8 physical
61 Incremental index of the PSE manager starting from 0, ranging
65 "#address-cells":
68 "#size-cells":
72 '^port@[0-7]$':
81 - reg
84 - reg
85 - "#address-cells"
86 - "#size-cells"
89 - compatible
90 - reg
91 - pse-pis
96 - |
98 #address-cells = <1>;
99 #size-cells = <0>;
101 ethernet-pse@3c {
106 #address-cells = <1>;
107 #size-cells = <0>;
111 #address-cells = <1>;
112 #size-cells = <0>;
133 #address-cells = <1>;
134 #size-cells = <0>;
154 pse-pis {
155 #address-cells = <1>;
156 #size-cells = <0>;
158 pse_pi0: pse-pi@0 {
160 #pse-cells = <0>;
161 pairset-names = "alternative-a", "alternative-b";
163 polarity-supported = "MDI", "S";
164 vpwr-supply = <&vpwr1>;
166 pse_pi1: pse-pi@1 {
168 #pse-cells = <0>;
169 pairset-names = "alternative-a";
171 polarity-supported = "MDI";
172 vpwr-supply = <&vpwr2>;