Lines Matching +full:active +full:- +full:low
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <[email protected]>
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
30 - compatible
31 - gpios
36 - |
38 An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
42 mdio-mux {
43 compatible = "mdio-mux-gpio";
45 mdio-parent-bus = <&smi1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
51 #address-cells = <1>;
52 #size-cells = <0>;
54 ethernet-phy@1 {
56 interrupt-parent = <&gpio>;
57 interrupts = <10 8>; /* Pin 10, active low */
59 ethernet-phy@2 {
61 interrupt-parent = <&gpio>;
62 interrupts = <10 8>; /* Pin 10, active low */
64 ethernet-phy@3 {
66 interrupt-parent = <&gpio>;
67 interrupts = <10 8>; /* Pin 10, active low */
69 ethernet-phy@4 {
71 interrupt-parent = <&gpio>;
72 interrupts = <10 8>; /* Pin 10, active low */
78 #address-cells = <1>;
79 #size-cells = <0>;
81 ethernet-phy@1 {
83 interrupt-parent = <&gpio>;
84 interrupts = <12 8>; /* Pin 12, active low */
86 ethernet-phy@2 {
88 interrupt-parent = <&gpio>;
89 interrupts = <12 8>; /* Pin 12, active low */
91 ethernet-phy@3 {
93 interrupt-parent = <&gpio>;
94 interrupts = <12 8>; /* Pin 12, active low */
96 ethernet-phy@4 {
98 interrupt-parent = <&gpio>;
99 interrupts = <12 8>; /* Pin 12, active low */