Lines Matching +full:no +full:- +full:hw +full:- +full:checksum
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: ethernet-controller.yaml#
13 - Po-Yu Chuang <ratbert@faraday-tech.com>
18 - const: faraday,ftgmac100
19 - items:
20 - enum:
21 - aspeed,ast2400-mac
22 - aspeed,ast2500-mac
23 - aspeed,ast2600-mac
24 - const: faraday,ftgmac100
35 - description: MAC IP clock
36 - description: RMII RCLK gate for AST2500/2600
38 clock-names:
41 - const: MACCLK
42 - const: RCLK
44 phy-mode:
46 - rgmii
47 - rmii
49 phy-handle: true
51 use-ncsi:
53 Use the NC-SI stack instead of an MDIO PHY. Currently assumes
54 rmii (100bT) but kept as a separate property in case NC-SI grows support
58 no-hw-checksum:
60 Used to disable HW checksum support. Here for backward
70 - compatible
71 - reg
72 - interrupts
77 - |
79 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
82 use-ncsi;
86 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
90 phy-handle = <&phy>;
91 phy-mode = "rgmii";
94 #address-cells = <1>;
95 #size-cells = <0>;
97 phy: ethernet-phy@1 {
98 compatible = "ethernet-phy-ieee802.3-c22";