Lines Matching +full:tx +full:- +full:internal +full:- +full:delay +full:- +full:ps
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <[email protected]>
11 - Florian Fainelli <[email protected]>
12 - Heiner Kallweit <[email protected]>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
28 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
32 - const: ethernet-phy-ieee802.3-c22
34 - const: ethernet-phy-ieee802.3-c45
36 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
46 - items:
47 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
48 - const: ethernet-phy-ieee802.3-c22
49 - items:
50 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
51 - const: ethernet-phy-ieee802.3-c45
62 max-speed:
64 - 10
65 - 100
66 - 1000
67 - 2500
68 - 5000
69 - 10000
70 - 20000
71 - 25000
72 - 40000
73 - 50000
74 - 56000
75 - 100000
76 - 200000
80 phy-10base-t1l-2.4vpp:
89 broken-turn-around:
96 brr-mode:
100 defined in the BroadR-Reach link mode specification under 1BR-100 and
101 1BR-10 names. The PHY must be configured to operate in BroadR-Reach mode
108 that the PHY uses a fixed crystal or an internal oscillator.
110 enet-phy-lane-swap:
113 If set, indicates the PHY will swap the TX/RX lanes to
117 enet-phy-lane-no-swap:
121 TX/RX lanes. This property allows the PHY to work correctly after
125 eee-broken-100tx:
131 eee-broken-1000t:
137 eee-broken-10gt:
143 eee-broken-1000kx:
149 eee-broken-10gkx4:
155 eee-broken-10gkr:
161 timing-role:
164 - forced-master
165 - forced-slave
166 - preferred-master
167 - preferred-slave
173 It is applicable to Single Pair Ethernet (1000/100/10Base-T1) and other
174 PHY types, including 1000Base-T, where it controls whether the PHY should
177 - 'forced-master': The PHY is forced to operate as a master.
178 - 'forced-slave': The PHY is forced to operate as a slave.
179 - 'preferred-master': Prefer the PHY to be master but allow negotiation.
180 - 'preferred-slave': Prefer the PHY to be slave but allow negotiation.
183 $ref: /schemas/types.yaml#/definitions/phandle-array
188 phy-is-integrated:
200 reset-names:
203 reset-gpios:
208 reset-assert-us:
210 Delay after the reset was asserted in microseconds. If this
211 property is missing the delay will be skipped.
213 reset-deassert-us:
215 Delay after the reset was deasserted in microseconds. If
216 this property is missing the delay will be skipped.
223 rx-internal-delay-ps:
225 RGMII Receive PHY Clock Delay defined in pico seconds. This is used for
226 PHY's that have configurable RX internal delays. If this property is
227 present then the PHY applies the RX delay.
229 tx-internal-delay-ps:
231 RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for
232 PHY's that have configurable TX internal delays. If this property is
233 present then the PHY applies the TX delay.
239 '#address-cells':
242 '#size-cells':
246 '^led@[a-f0-9]+$':
258 - reg
265 - reg
270 - |
271 #include <dt-bindings/leds/common.h>
274 #address-cells = <1>;
275 #size-cells = <0>;
277 ethernet-phy@0 {
278 compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45";
279 interrupt-parent = <&PIC>;
284 reset-names = "phy";
285 reset-gpios = <&gpio1 4 1>;
286 reset-assert-us = <1000>;
287 reset-deassert-us = <2000>;
290 #address-cells = <1>;
291 #size-cells = <0>;
297 default-state = "keep";