Lines Matching +full:can +full:- +full:primary
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: STMicroelectronics BxCAN controller for CAN bus
12 - Dario Binacchi <[email protected]>
15 - $ref: can-controller.yaml#
20 - st,stm32f4-bxcan
22 st,can-primary:
24 Primary mode of the bxCAN peripheral is only relevant if the chip has
25 two CAN peripherals in dual CAN configuration. In that case they share
27 Not to be used if the peripheral is in single CAN configuration.
29 uses the terms master instead of primary.
32 st,can-secondary:
35 has two CAN peripherals in dual CAN configuration. In that case they
37 Not to be used if the peripheral is in single CAN configuration.
47 - description: transmit interrupt
48 - description: FIFO 0 receive interrupt
49 - description: FIFO 1 receive interrupt
50 - description: status change error interrupt
52 interrupt-names:
54 - const: tx
55 - const: rx0
56 - const: rx1
57 - const: sce
68 The phandle to the gcan node which allows to access the 512-bytes
69 SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2
70 secondary) in dual CAN peripheral configuration.
73 - compatible
74 - reg
75 - interrupts
76 - resets
77 - clocks
78 - st,gcan
83 - |
84 #include <dt-bindings/clock/stm32fx-clock.h>
85 #include <dt-bindings/mfd/stm32f4-rcc.h>
87 can1: can@40006400 {
88 compatible = "st,stm32f4-bxcan";
91 interrupt-names = "tx", "rx0", "rx1", "sce";
94 st,can-primary;