Lines Matching +full:sun8i +full:- +full:a23 +full:- +full:nand +full:- +full:controller
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/allwinner,sun4i-a10-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 NAND Controller
10 - $ref: nand-controller.yaml
13 - Chen-Yu Tsai <[email protected]>
14 - Maxime Ripard <[email protected]>
19 - allwinner,sun4i-a10-nand
20 - allwinner,sun8i-a23-nand-controller
29 - description: Bus Clock
30 - description: Module Clock
32 clock-names:
34 - const: ahb
35 - const: mod
40 reset-names:
46 dma-names:
50 "^nand@[a-f0-9]$":
52 $ref: raw-nand-chip.yaml
58 nand-ecc-algo:
61 nand-ecc-step-size:
64 nand-ecc-strength:
70 $ref: /schemas/types.yaml#/definitions/uint32-array
80 - compatible
81 - reg
82 - interrupts
83 - clocks
84 - clock-names
89 - |
90 #include <dt-bindings/interrupt-controller/arm-gic.h>
91 #include <dt-bindings/clock/sun6i-rtc.h>
92 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
93 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
95 nand-controller@1c03000 {
96 compatible = "allwinner,sun8i-a23-nand-controller";
100 clock-names = "ahb", "mod";
102 reset-names = "ahb";
104 dma-names = "rxtx";
105 pinctrl-names = "default";
106 pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
107 #address-cells = <1>;
108 #size-cells = <0>;