Lines Matching +full:sdfec +full:- +full:code
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx SDFEC(16nm) IP
10 - Cvetic, Dragan <[email protected]>
11 - Erim, Salih <[email protected]>
14 The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block
15 which provides high-throughput LDPC and Turbo Code implementations.
17 customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
23 const: xlnx,sd-fec-1.1
33 - description: Main processing clock for processing core
34 - description: AXI4-Lite memory-mapped slave interface clock
35 - description: Control input AXI4-Stream Slave interface clock
36 - description: DIN AXI4-Stream Slave interface clock
37 - description: Status output AXI4-Stream Master interface clock
38 - description: DOUT AXI4-Stream Master interface clock
39 - description: DIN_WORDS AXI4-Stream Slave interface clock
40 - description: DOUT_WORDS AXI4-Stream Master interface clock
42 clock-names:
44 - minItems: 2
48 - const: core_clk
49 - const: s_axi_aclk
50 - items:
52 - core_clk
53 - s_axi_aclk
54 - s_axis_ctrl_aclk
55 - s_axis_din_aclk
56 - m_axis_status_aclk
57 - m_axis_dout_aclk
58 - s_axis_din_words_aclk
59 - m_axis_dout_words_aclk
64 xlnx,sdfec-code:
66 The SD-FEC integrated block supports Low Density Parity Check (LDPC)
67 decoding and encoding and Turbo code decoding. The LDPC codes used are
68 highly configurable, and the specific code used can be specified on
69 a codeword-by-codeword basis. The Turbo code decoding is required by LTE
75 xlnx,sdfec-din-width:
83 xlnx,sdfec-din-words:
92 xlnx,sdfec-dout-width:
99 xlnx,sdfec-dout-words:
109 - compatible
110 - reg
111 - clocks
112 - clock-names
113 - xlnx,sdfec-code
114 - xlnx,sdfec-din-width
115 - xlnx,sdfec-din-words
116 - xlnx,sdfec-dout-width
117 - xlnx,sdfec-dout-words
122 - |
123 #include <dt-bindings/interrupt-controller/irq.h>
125 sd-fec@a0040000 {
126 compatible = "xlnx,sd-fec-1.1";
130 clock-names = "core_clk", "s_axi_aclk", "s_axis_ctrl_aclk",
134 xlnx,sdfec-code = "ldpc";
135 xlnx,sdfec-din-width = <2>;
136 xlnx,sdfec-din-words = <0>;
137 xlnx,sdfec-dout-width = <1>;
138 xlnx,sdfec-dout-words = <0>;