Lines Matching +full:display +full:- +full:controller
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel's HLCD Controller
10 - Nicolas Ferre <[email protected]>
11 - Alexandre Belloni <[email protected]>
12 - Claudiu Beznea <[email protected]>
15 The Atmel HLCDC (HLCD Controller) IP available on Atmel SoCs exposes two
16 subdevices, a PWM chip and a Display Controller.
21 - atmel,at91sam9n12-hlcdc
22 - atmel,at91sam9x5-hlcdc
23 - atmel,sama5d2-hlcdc
24 - atmel,sama5d3-hlcdc
25 - atmel,sama5d4-hlcdc
26 - microchip,sam9x60-hlcdc
27 - microchip,sam9x75-xlcdc
38 clock-names:
40 - const: periph_clk
41 - const: sys_clk
42 - const: slow_clk
43 - const: lvds_pll_clk
46 display-controller:
47 $ref: /schemas/display/atmel/atmel,hlcdc-display-controller.yaml
50 $ref: /schemas/pwm/atmel,hlcdc-pwm.yaml
53 - compatible
54 - reg
55 - clocks
56 - clock-names
57 - interrupts
62 - |
63 #include <dt-bindings/clock/at91.h>
64 #include <dt-bindings/dma/at91.h>
65 #include <dt-bindings/interrupt-controller/arm-gic.h>
67 lcd_controller: lcd-controller@f0030000 {
68 compatible = "atmel,sama5d3-hlcdc";
71 clock-names = "periph_clk", "sys_clk", "slow_clk";
74 display-controller {
75 compatible = "atmel,hlcdc-display-controller";
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
78 #address-cells = <1>;
79 #size-cells = <0>;
82 #address-cells = <1>;
83 #size-cells = <0>;
88 remote-endpoint = <&panel_input>;
94 compatible = "atmel,hlcdc-pwm";
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_lcd_pwm>;
97 #pwm-cells = <3>;