Lines Matching +full:ipq806x +full:- +full:nand
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <[email protected]>
11 - Bjorn Andersson <[email protected]>
15 peripheral buses such as NAND and SPI.
27 "#dma-cells":
32 - description: phandle to the core clock
33 - description: phandle to the iface clock
35 clock-names:
37 - const: core
38 - const: iface
42 - description: phandle to the clk reset
43 - description: phandle to the pbus reset
44 - description: phandle to the c0 reset
45 - description: phandle to the c1 reset
46 - description: phandle to the c2 reset
48 reset-names:
50 - const: clk
51 - const: pbus
52 - const: c0
53 - const: c1
54 - const: c2
63 - compatible
64 - reg
65 - interrupts
66 - "#dma-cells"
67 - clocks
68 - clock-names
69 - resets
70 - reset-names
71 - qcom,ee
76 - |
77 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
78 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
80 adm_dma: dma-controller@18300000 {
84 #dma-cells = <1>;
88 clock-names = "core", "iface";
95 reset-names = "clk", "pbus", "c0", "c1", "c2";