Lines Matching +full:0 +full:x0ae94000
135 port@0:149 enum: [ 0, 1, 2, 3 ]165 enum: [ 0, 1, 2, 3 ]184 - port@0428 reg = <0x0ae94000 0x400>;432 #size-cells = <0>;454 assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;461 #size-cells = <0>;463 port@0 {464 reg = <0>;474 data-lanes = <0 1 2 3>;