Lines Matching full:vdosys1
178 clocks = <&vdosys1 CLK_VDO1_DISP_MIXER>,
179 <&vdosys1 CLK_VDO1_HDR_VDO_FE0>,
180 <&vdosys1 CLK_VDO1_HDR_VDO_FE1>,
181 <&vdosys1 CLK_VDO1_HDR_GFX_FE0>,
182 <&vdosys1 CLK_VDO1_HDR_GFX_FE1>,
183 <&vdosys1 CLK_VDO1_HDR_VDO_BE>,
184 <&vdosys1 CLK_VDO1_26M_SLOW>,
185 <&vdosys1 CLK_VDO1_HDR_VDO_FE0_DL_ASYNC>,
186 <&vdosys1 CLK_VDO1_HDR_VDO_FE1_DL_ASYNC>,
187 <&vdosys1 CLK_VDO1_HDR_GFX_FE0_DL_ASYNC>,
188 <&vdosys1 CLK_VDO1_HDR_GFX_FE1_DL_ASYNC>,
189 <&vdosys1 CLK_VDO1_HDR_VDO_BE_DL_ASYNC>,
199 resets = <&vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE0_DL_ASYNC>,
200 <&vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE1_DL_ASYNC>,
201 <&vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE0_DL_ASYNC>,
202 <&vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE1_DL_ASYNC>,
203 <&vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_BE_DL_ASYNC>;