Lines Matching +full:stm32 +full:- +full:rcc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Reset Clock Controller
10 - Dario Binacchi <[email protected]>
13 The RCC IP is both a reset and a clock controller.
14 The reset phandle argument is the bit number within the RCC registers bank,
15 starting from RCC base address.
20 - items:
21 - enum:
22 - st,stm32f42xx-rcc
23 - st,stm32f746-rcc
24 - st,stm32h743-rcc
25 - const: st,stm32-rcc
26 - items:
27 - enum:
28 - st,stm32f469-rcc
29 - const: st,stm32f42xx-rcc
30 - const: st,stm32-rcc
31 - items:
32 - enum:
33 - st,stm32f769-rcc
34 - const: st,stm32f746-rcc
35 - const: st,stm32-rcc
40 '#reset-cells':
43 '#clock-cells':
56 st,ssc-modfreq-hz:
60 st,ssc-moddepth-permyriad:
67 st,ssc-modmethod:
73 - center-spread
74 - down-spread
77 - compatible
78 - reg
79 - '#reset-cells'
80 - '#clock-cells'
81 - clocks
82 - st,syscfg
85 - if:
89 const: st,stm32h743-rcc
92 '#clock-cells':
98 - description: high speed external (HSE) clock input
99 - description: low speed external (LSE) clock input
100 - description: Inter-IC sound (I2S) clock input
101 st,ssc-modfreq-hz: false
102 st,ssc-moddepth-permyriad: false
103 st,ssc-modmethod: false
107 '#clock-cells':
110 - The first cell is the clock type, possible values are 0 for
112 - The second cell is the clock index for the specified type.
115 - description: high speed external (HSE) clock input
116 - description: Inter-IC sound (I2S) clock input
122 - |
123 clock-controller@40023800 {
124 compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
126 #clock-cells = <2>;
127 #reset-cells = <1>;
130 st,ssc-modfreq-hz = <10000>;
131 st,ssc-moddepth-permyriad = <200>;
132 st,ssc-modmethod = "center-spread";
134 - |
135 clock-controller@58024400 {
136 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
138 #clock-cells = <1>;
139 #reset-cells = <1>;