Lines Matching +full:sata +full:- +full:0
12 -----------------------------------
13 0 Audio AC97 Cntrl
14 1 pex0_en PCIe 0 Clock out
17 4 ge0 Gigabit Ethernet 0
18 5 pex0 PCIe Cntrl 0
20 15 sata0 SATA Host 0
25 30 sata1 SATA Host 0
29 -----------------------------------
33 5 pex0 PCIe 0 Clock out
37 14 sata0_link SATA 0 Link
38 15 sata0_core SATA 0 Core
43 20 sata1_link SATA 1 Link
44 21 sata1_core SATA 1 Core
45 22 xor0 XOR DMA 0
46 23 xor1 XOR DMA 0
49 28 crypto0_enc Cryptographic Unit Port 0 Encryption
50 29 crypto0_core Cryptographic Unit Port 0 Core
56 -----------------------------------
57 0 audio Audio
60 4 ge0 Gigabit Ethernet 0
64 8 pex0 PCIe 0
65 9 usb3h0 USB3 Host 0
69 14 crypto0z Cryptographic 0 Z
70 15 sata0 SATA 0
75 22 xor0 XOR 0
76 23 crypto0 Cryptographic 0
79 30 sata1 SATA 1
83 -----------------------------------
87 8 pex0 PCIe 0
88 9 usb3h0 USB3 Host 0
90 15 sata0 SATA 0
92 22 xor0 XOR 0
97 -----------------------------------
98 0 audio Audio Cntrl
102 4 ge0 Gigabit Ethernet 0
103 5 pex0 PCIe Cntrl 0
109 15 sata0 SATA Host 0
112 18 usb0 USB Host 0
115 22 xor0 XOR DMA 0
120 30 sata1 SATA Host 1
124 -----------------------------------
126 4 ge0 Gigabit Ethernet 0
127 5 pex0 PCIe Cntrl 0
129 18 usb0 USB Host 0
130 22 xor0 XOR DMA 0
134 -----------------------------------
135 0 usb0 USB Host 0
138 3 sata SATA Host
139 4 pex0 PCIe Cntrl 0
141 8 sdio0 SDHCI Host 0
145 12 i2s0 I2S Cntrl 0
150 23 xor0 XOR DMA 0
157 -----------------------------------
158 0 ge0 Gigabit Ethernet 0
159 2 pex0 PCIe Cntrl 0
160 3 usb0 USB Host 0
165 8 xor0 XOR DMA 0
166 9 audio I2S Cntrl 0
167 14 sata0 SATA Host 0
168 15 sata1 SATA Host 1
176 - compatible : shall be one of the following:
177 "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
178 "marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
179 "marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
180 "marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
181 "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
182 "marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
183 "marvell,dove-gating-clock" - for Dove SoC clock gating
184 "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
185 - reg : shall be the register address of the Clock Gating Control register
186 - #clock-cells : from common clock binding; shall be set to 1
189 - clocks : default parent clock phandle (e.g. tclk)
193 gate_clk: clock-gating-control@d0038 {
194 compatible = "marvell,dove-gating-clock";
195 reg = <0xd0038 0x4>;
197 clocks = <&core_clk 0>;
198 #clock-cells = <1>;
202 compatible = "marvell,dove-sdhci";