Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:mod0 +full:- +full:clk

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Module 0 Clock
10   - Chen-Yu Tsai <[email protected]>
11   - Maxime Ripard <[email protected]>
20           - allwinner,sun4i-a10-mod0-clk
21           - allwinner,sun9i-a80-mod0-clk
27     - compatible
28     - reg
31   "#clock-cells":
36       - allwinner,sun4i-a10-mod0-clk
37       - allwinner,sun9i-a80-mod0-clk
43     # On the A80, the PRCM mod0 clocks have 2 parents.
49   clock-output-names:
53   - "#clock-cells"
54   - compatible
55   - reg
56   - clocks
57   - clock-output-names
62   - |
63     clk@1c20080 {
64         #clock-cells = <0>;
65         compatible = "allwinner,sun4i-a10-mod0-clk";
68         clock-output-names = "nand";
71   - |
72     clk@8001454 {
73         #clock-cells = <0>;
74         compatible = "allwinner,sun4i-a10-mod0-clk";
77         clock-output-names = "r_ir";