Lines Matching +full:sdm845 +full:- +full:llcc
1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <[email protected]>
13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
23 - qcom,ipq5424-llcc
24 - qcom,qcs615-llcc
25 - qcom,qcs8300-llcc
26 - qcom,qdu1000-llcc
27 - qcom,sa8775p-llcc
28 - qcom,sar1130p-llcc
29 - qcom,sar2130p-llcc
30 - qcom,sc7180-llcc
31 - qcom,sc7280-llcc
32 - qcom,sc8180x-llcc
33 - qcom,sc8280xp-llcc
34 - qcom,sdm845-llcc
35 - qcom,sm6350-llcc
36 - qcom,sm7150-llcc
37 - qcom,sm8150-llcc
38 - qcom,sm8250-llcc
39 - qcom,sm8350-llcc
40 - qcom,sm8450-llcc
41 - qcom,sm8550-llcc
42 - qcom,sm8650-llcc
43 - qcom,x1e80100-llcc
49 reg-names:
56 nvmem-cells:
58 - description: Reference to an nvmem node for multi channel DDR
60 nvmem-cell-names:
62 - const: multi-chan-ddr
65 - compatible
66 - reg
67 - reg-names
70 - if:
75 - qcom,ipq5424-llcc
80 - description: LLCC0 base register region
81 reg-names:
83 - const: llcc0_base
85 - if:
90 - qcom,sar1130p-llcc
91 - qcom,sar2130p-llcc
96 - description: LLCC0 base register region
97 - description: LLCC1 base register region
98 - description: LLCC broadcast OR register region
99 - description: LLCC broadcast AND register region
100 - description: LLCC scratchpad broadcast OR register region
101 - description: LLCC scratchpad broadcast AND register region
102 reg-names:
104 - const: llcc0_base
105 - const: llcc1_base
106 - const: llcc_broadcast_base
107 - const: llcc_broadcast_and_base
108 - const: llcc_scratchpad_broadcast_base
109 - const: llcc_scratchpad_broadcast_and_base
111 - if:
116 - qcom,qcs615-llcc
117 - qcom,sc7180-llcc
118 - qcom,sm6350-llcc
123 - description: LLCC0 base register region
124 - description: LLCC broadcast base register region
125 reg-names:
127 - const: llcc0_base
128 - const: llcc_broadcast_base
130 - if:
135 - qcom,sa8775p-llcc
140 - description: LLCC0 base register region
141 - description: LLCC1 base register region
142 - description: LLCC2 base register region
143 - description: LLCC3 base register region
144 - description: LLCC4 base register region
145 - description: LLCC5 base register region
146 - description: LLCC broadcast base register region
147 reg-names:
149 - const: llcc0_base
150 - const: llcc1_base
151 - const: llcc2_base
152 - const: llcc3_base
153 - const: llcc4_base
154 - const: llcc5_base
155 - const: llcc_broadcast_base
157 - if:
162 - qcom,sc7280-llcc
167 - description: LLCC0 base register region
168 - description: LLCC1 base register region
169 - description: LLCC broadcast base register region
170 reg-names:
172 - const: llcc0_base
173 - const: llcc1_base
174 - const: llcc_broadcast_base
176 - if:
181 - qcom,qdu1000-llcc
182 - qcom,sc8180x-llcc
183 - qcom,sc8280xp-llcc
188 - description: LLCC0 base register region
189 - description: LLCC1 base register region
190 - description: LLCC2 base register region
191 - description: LLCC3 base register region
192 - description: LLCC4 base register region
193 - description: LLCC5 base register region
194 - description: LLCC6 base register region
195 - description: LLCC7 base register region
196 - description: LLCC broadcast base register region
197 reg-names:
199 - const: llcc0_base
200 - const: llcc1_base
201 - const: llcc2_base
202 - const: llcc3_base
203 - const: llcc4_base
204 - const: llcc5_base
205 - const: llcc6_base
206 - const: llcc7_base
207 - const: llcc_broadcast_base
209 - if:
214 - qcom,x1e80100-llcc
219 - description: LLCC0 base register region
220 - description: LLCC1 base register region
221 - description: LLCC2 base register region
222 - description: LLCC3 base register region
223 - description: LLCC4 base register region
224 - description: LLCC5 base register region
225 - description: LLCC6 base register region
226 - description: LLCC7 base register region
227 - description: LLCC broadcast base register region
228 - description: LLCC broadcast AND register region
229 reg-names:
231 - const: llcc0_base
232 - const: llcc1_base
233 - const: llcc2_base
234 - const: llcc3_base
235 - const: llcc4_base
236 - const: llcc5_base
237 - const: llcc6_base
238 - const: llcc7_base
239 - const: llcc_broadcast_base
240 - const: llcc_broadcast_and_base
242 - if:
247 - qcom,qcs8300-llcc
248 - qcom,sdm845-llcc
249 - qcom,sm8150-llcc
250 - qcom,sm8250-llcc
251 - qcom,sm8350-llcc
256 - description: LLCC0 base register region
257 - description: LLCC1 base register region
258 - description: LLCC2 base register region
259 - description: LLCC3 base register region
260 - description: LLCC broadcast base register region
261 reg-names:
263 - const: llcc0_base
264 - const: llcc1_base
265 - const: llcc2_base
266 - const: llcc3_base
267 - const: llcc_broadcast_base
269 - if:
274 - qcom,sm8450-llcc
275 - qcom,sm8550-llcc
276 - qcom,sm8650-llcc
281 - description: LLCC0 base register region
282 - description: LLCC1 base register region
283 - description: LLCC2 base register region
284 - description: LLCC3 base register region
285 - description: LLCC broadcast OR register region
286 - description: LLCC broadcast AND register region
287 reg-names:
289 - const: llcc0_base
290 - const: llcc1_base
291 - const: llcc2_base
292 - const: llcc3_base
293 - const: llcc_broadcast_base
294 - const: llcc_broadcast_and_base
299 - |
300 #include <dt-bindings/interrupt-controller/arm-gic.h>
303 #address-cells = <2>;
304 #size-cells = <2>;
306 system-cache-controller@1100000 {
307 compatible = "qcom,sdm845-llcc";
311 reg-names = "llcc0_base", "llcc1_base", "llcc2_base",