Lines Matching +full:gce +full:- +full:client +full:- +full:reg
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <[email protected]>
18 pattern: "^syscon@[0-9a-f]+$"
22 - items:
23 - enum:
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
27 - mediatek,mt6779-mmsys
28 - mediatek,mt6795-mmsys
29 - mediatek,mt6797-mmsys
30 - mediatek,mt8167-mmsys
31 - mediatek,mt8173-mmsys
32 - mediatek,mt8183-mmsys
33 - mediatek,mt8186-mmsys
34 - mediatek,mt8188-vdosys0
35 - mediatek,mt8188-vdosys1
36 - mediatek,mt8188-vppsys0
37 - mediatek,mt8188-vppsys1
38 - mediatek,mt8192-mmsys
39 - mediatek,mt8195-vdosys1
40 - mediatek,mt8195-vppsys0
41 - mediatek,mt8195-vppsys1
42 - mediatek,mt8365-mmsys
43 - const: syscon
45 - description: vdosys0 and vdosys1 are 2 display HW pipelines,
49 - const: mediatek,mt8195-mmsys
50 - const: syscon
52 - items:
53 - const: mediatek,mt7623-mmsys
54 - const: mediatek,mt2701-mmsys
55 - const: syscon
57 - items:
58 - const: mediatek,mt8195-vdosys0
59 - const: mediatek,mt8195-mmsys
60 - const: syscon
62 reg:
65 power-domains:
69 Documentation/devicetree/bindings/power/power-domain.yaml for details.
73 Using mailbox to communicate with GCE, it should have this
75 Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
77 $ref: /schemas/types.yaml#/definitions/phandle-array
79 mediatek,gce-client-reg:
81 The register of client driver can be configured by gce with 4 arguments
82 defined in this property, such as phandle of gce, subsys id,
85 register which is defined in the gce header
86 include/dt-bindings/gce/<chip>-gce.h.
87 $ref: /schemas/types.yaml#/definitions/phandle-array
90 "#clock-cells":
93 '#reset-cells':
117 - required:
118 - endpoint@0
119 - required:
120 - endpoint@1
121 - required:
122 - endpoint@2
125 - compatible
126 - reg
127 - "#clock-cells"
132 - |
133 #include <dt-bindings/power/mt8173-power.h>
134 #include <dt-bindings/gce/mt8173-gce.h>
137 compatible = "mediatek,mt8173-mmsys", "syscon";
138 reg = <0x14000000 0x1000>;
139 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
140 #clock-cells = <1>;
141 #reset-cells = <1>;
142 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
143 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
144 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;