Lines Matching +full:wed +full:- +full:pcie
29 +----------+ +---------+
35 +----------+ +---------+
37 | +------+ | PSL |
38 | | CAPP |<------>| |
39 +---+------+ PCIE +---------+
42 unit which is part of the PCIe Host Bridge (PHB). This is managed
66 - POWER8 and PSL Version 8 are compliant to the CAIA Version 1.0.
67 - POWER9 and PSL Version 9 are compliant to the CAIA Version 2.0.
121 Work Element Descriptor (WED)
124 The WED is a 64-bit parameter passed to the AFU when a context is
158 https://github.com/ibm-capi/libcxl
163 ----
175 and return -ENOSPC.
188 -----
221 The Work Element Descriptor (WED) is a 64-bit argument
250 ----
264 Care should be taken when accessing MMIO space. Only 32 and 64-bit
269 queues the WED may describe.
273 ----
276 (unless O_NONBLOCK is supplied). Returns -EIO in the case of an
409 ----
415 -----
457 described in Documentation/ABI/obsolete/sysfs-class-cxl
470 KERNEL=="afu[0-9]*.[0-9]*s", SYMLINK="cxl/%b"