Lines Matching +full:soc +full:- +full:dependent
2 NVIDIA Tegra SoC Uncore Performance Monitoring Unit (PMU)
5 The NVIDIA Tegra SoC includes various system PMUs to measure key performance
9 * NVLink-C2C0
10 * NVLink-C2C1
15 ----------
19 PMUs are managed by a common driver "arm-cs-arch-pmu". This driver describes
29 -------
32 strongly-ordered (SO) PCIE write traffic to local/remote memory. Please see
37 see /sys/bus/event_source/devices/nvidia_scf_pmu_<socket-id>.
43 perf stat -a -e nvidia_scf_pmu_0/event=0x0/
47 perf stat -a -e nvidia_scf_pmu_1/event=0x0/
49 NVLink-C2C0 PMU
50 --------------------
52 The NVLink-C2C0 PMU monitors incoming traffic from a GPU/CPU connected with
53 NVLink-C2C (Chip-2-Chip) interconnect. The type of traffic captured by this PMU
54 varies dependent on the chip configuration:
56 * NVIDIA Grace Hopper Superchip: Hopper GPU is connected with Grace SoC.
63 PCIE device of the remote SoC.
69 see /sys/bus/event_source/devices/nvidia_nvlink_c2c0_pmu_<socket-id>.
75 perf stat -a -e nvidia_nvlink_c2c0_pmu_0/event=0x0/
79 perf stat -a -e nvidia_nvlink_c2c0_pmu_1/event=0x0/
83 perf stat -a -e nvidia_nvlink_c2c0_pmu_2/event=0x0/
87 perf stat -a -e nvidia_nvlink_c2c0_pmu_3/event=0x0/
89 The NVLink-C2C has two ports that can be connected to one GPU (occupying both
99 perf stat -a -e nvidia_nvlink_c2c0_pmu_0/event=0x0,port=0x1/
103 perf stat -a -e nvidia_nvlink_c2c0_pmu_0/event=0x0,port=0x3/
105 NVLink-C2C1 PMU
106 -------------------
108 The NVLink-C2C1 PMU monitors incoming traffic from a GPU connected with
109 NVLink-C2C (Chip-2-Chip) interconnect. This PMU captures untranslated GPU
110 traffic, in contrast with NvLink-C2C0 PMU that captures ATS translated traffic.
115 see /sys/bus/event_source/devices/nvidia_nvlink_c2c1_pmu_<socket-id>.
121 perf stat -a -e nvidia_nvlink_c2c1_pmu_0/event=0x0/
125 perf stat -a -e nvidia_nvlink_c2c1_pmu_1/event=0x0/
129 perf stat -a -e nvidia_nvlink_c2c1_pmu_2/event=0x0/
133 perf stat -a -e nvidia_nvlink_c2c1_pmu_3/event=0x0/
135 The NVLink-C2C has two ports that can be connected to one GPU (occupying both
145 perf stat -a -e nvidia_nvlink_c2c1_pmu_0/event=0x0,port=0x1/
149 perf stat -a -e nvidia_nvlink_c2c1_pmu_0/event=0x0,port=0x3/
152 ---------------
160 see /sys/bus/event_source/devices/nvidia_cnvlink_pmu_<socket-id>.
162 Each SoC socket can be connected to one or more sockets via CNVLink. The user can
167 /sys/bus/event_source/devices/nvidia_cnvlink_pmu_<socket-id>/format/rem_socket
178 perf stat -a -e nvidia_cnvlink_pmu_0/event=0x0,rem_socket=0xE/
182 perf stat -a -e nvidia_cnvlink_pmu_1/event=0x0,rem_socket=0xD/
186 perf stat -a -e nvidia_cnvlink_pmu_2/event=0x0,rem_socket=0xB/
190 perf stat -a -e nvidia_cnvlink_pmu_3/event=0x0,rem_socket=0x7/
194 ------------
201 see /sys/bus/event_source/devices/nvidia_pcie_pmu_<socket-id>.
203 Each SoC socket can support multiple root ports. The user can use
207 /sys/bus/event_source/devices/nvidia_pcie_pmu_<socket-id>/format/root_port
214 perf stat -a -e nvidia_pcie_pmu_0/event=0x0,root_port=0x3/
218 perf stat -a -e nvidia_pcie_pmu_1/event=0x0,root_port=0x3/
223 ----------------
225 The PMU traffic coverage may vary dependent on the chip configuration:
227 * **NVIDIA Grace Hopper Superchip**: Hopper GPU is connected with Grace SoC.
232 * SOCKET-A * * SOCKET-B *
241 * : GPU :<--NVLink-->: Grace :<---CNVLink--->: Grace :<--NVLink-->: GPU : *
242 * : : C2C : SoC : * * : SoC : C2C : : *
256 | Following table contains traffic coverage of Grace SoC PMU in socket-A:
260 +--------------+-------+-----------+-----------+-----+----------+----------+
262 + +-------+-----------+-----------+-----+----------+----------+
263 | Destination | |GPU ATS |GPU Not-ATS| | Socket-B | Socket-B |
267 | Local | PCIE |NVLink-C2C0|NVLink-C2C1| SCF | SCF PMU | CNVLink |
269 +--------------+-------+-----------+-----------+-----+----------+----------+
270 | Local GMEM | PCIE | N/A |NVLink-C2C1| SCF | SCF PMU | CNVLink |
272 +--------------+-------+-----------+-----------+-----+----------+----------+
273 | Remote | PCIE |NVLink-C2C0|NVLink-C2C1| SCF | | |
276 +--------------+-------+-----------+-----------+-----+----------+----------+
277 | Remote GMEM | PCIE |NVLink-C2C0|NVLink-C2C1| SCF | | |
279 +--------------+-------+-----------+-----------+-----+----------+----------+
289 * SOCKET-A * * SOCKET-B *
298 * : Grace :<--------NVLink------->: Grace : *
299 * : SoC : * C2C * : SoC : *
313 | Following table contains traffic coverage of Grace SoC PMU in socket-A:
317 +-----------------+-----------+---------+----------+-------------+
319 + +-----------+---------+----------+-------------+
320 | Destination | | | Socket-B | Socket-B |
324 | Local | PCIE PMU | SCF PMU | SCF PMU | NVLink-C2C0 |
326 +-----------------+-----------+---------+----------+-------------+
329 | over NVLink-C2C | | | | |
330 +-----------------+-----------+---------+----------+-------------+