Lines Matching +full:input +full:- +full:value
1 .. SPDX-License-Identifier: GPL-2.0
7 ---------------
13 There are two types of parameters - global / PCI card related, found under
23 | 0 - No module present
24 | 1 - FPDL3
25 | 2 - GMSL
33 | 1 - FPDL3
34 | 2 - GMSL
42 PRODUCT-REVISION-SERIES-SERIAL
46 Common FPDL3/GMSL input parameters
50 Input number ID, zero based.
55 | 0 - single
56 | 1 - dual (default)
61 | 0 - OLDI/JEIDA
62 | 1 - SPWG/VESA (default)
69 A value of 0 is equivalent to the V4L2_IN_ST_NO_SYNC flag of the V4L2
72 | 0 - unlocked
73 | 1 - locked
76 Video stream status. A stream is detected if the link is locked, the input
79 A value of 0 is equivalent to the V4L2_IN_ST_NO_SIGNAL flag of the V4L2
82 | 0 - not detected
83 | 1 - detected
88 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in the width
94 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in the height
100 The value is equivalent to the flags returned by VIDIOC_QUERY_DV_TIMINGS in
103 | 0 - active low
104 | 1 - active high
105 | 2 - not available
110 The value is equivalent to the flags returned by VIDIOC_QUERY_DV_TIMINGS in
113 | 0 - active low
114 | 1 - active high
115 | 2 - not available
120 the correct frame ordering. This value indicates, how many "empty" pixels
127 the correct frame ordering. This value indicates, how many "empty" pixels
129 internal HSYNC pulse. The value must be greater than 1 and smaller than
133 Input pixel clock frequency in kHz.
135 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
144 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
150 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
157 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
164 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
171 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
178 The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
182 PLL frequency range of the OLDI input clock generator. The PLL frequency is
187 | 0 - PLL < 50MHz (default)
188 | 1 - PLL >= 50MHz
190 *Note: This parameter can not be changed while the input v4l2 device is
201 input and the v4l2 output devices are disabled. If set to 2 or 3, the source
205 | 0 - input 0
206 | 1 - input 1
207 | 2 - v4l2 output 0
208 | 3 - v4l2 output 1
210 *Note: This parameter can not be changed while ANY of the input/output v4l2
215 proper value must be set before the start of streaming. The default width
223 proper value must be set before the start of streaming. The default height
232 a frame rate perfectly matching the value required by the connected display.
241 | 0 - active low (default)
242 | 1 - active high
247 | 0 - active low (default)
248 | 1 - active high
253 | 0 - active low
254 | 1 - active high (default)
257 Output pixel clock frequency. Allowed values are between 25000-190000(kHz)
258 and there is a non-linear stepping between two consecutive allowed
260 value and sets it. When reading this property, you get the exact
267 Width of the HSYNC signal in pixels. The default value is 40.
270 Width of the VSYNC signal in video lines. The default value is 20.
274 valid pixel in the video line (marked by DE=1). The default value is 50.
278 line (marked by DE=1) and assertion of the HSYNC signal. The default value
283 line with the first valid pixel (marked by DE=1). The default value is 31.
287 by DE=1) and assertion of the VSYNC signal. The default value is 30.
289 FPDL3 specific input parameters
293 Number of deserializer input lines.
295 | 0 - auto (default)
296 | 1 - single
297 | 2 - dual
305 | 0 - auto (default)
306 | 1 - single
307 | 2 - dual
309 GMSL specific input parameters
315 | 0 - 12Gb/s (default)
316 | 1 - 6Gb/s
317 | 2 - 3Gb/s
318 | 3 - 1.5Gb/s
321 The GMSL multi-stream contains up to four video streams. This parameter
322 selects which stream is captured by the video input. The value is the
323 zero-based index of the stream. The default stream id is 0.
325 *Note: This parameter can not be changed while the input v4l2 device is
331 | 0 - disabled
332 | 1 - enabled (default)
335 --------------
338 - mgb4-fw.X - FPGA firmware.
339 - mgb4-data.X - Factory settings, e.g. card serial number.
341 The *mgb4-fw* partition is writable and is used for FW updates, *mgb4-data* is
342 read-only. The *X* attached to the partition name represents the card number.
344 also have a third partition named *mgb4-flash* available in the system. This
349 --------------
357 | bit 1 - trigger 1 pending
358 | bit 2 - trigger 2 pending
359 | bit 5 - trigger 1 level
360 | bit 6 - trigger 2 level
374 buffer mode - the values do not represent valid data in such case.*