Lines Matching +full:hardware +full:- +full:bound

1 .. SPDX-License-Identifier: GPL-2.0-only
15 AMD NPU (Neural Processing Unit) is a multi-user AI inference accelerator
21 Hardware Description
24 AMD NPU consists of the following hardware components:
27 --------------
34 partition which can be bound to a workload context.
44 ----------------
52 ---------------
58 NPU Firmware uses a dedicated instance of an isolated non-privileged context
66 ---------
71 serviced by MERT. The privileged channel is bound to a single mailbox.
76 instance of ERT. Each user channel is bound to its own dedicated mailbox.
79 -------
82 MSI-X interrupt vectors. NPU uses a dedicated high bandwidth SoC level fabric
84 dedicated MSI-X interrupt. MERT gets a single instance of MSI-X interrupt.
96 On specific devices, the above-mentioned BAR type might be combined into a
105 Process Isolation Hardware
106 --------------------------
125 may be *exclusively* bound to one workload context while another partition may
126 be *temporarily* bound to more than one workload contexts. The microcontroller
128 has been bound to the partition at any moment.
131 ---------------
138 temporal sharing of columns. The FW enforces the context-to-column(s) resource
154    spatial partition bound to the workload by the associated ERT instance.
156    `Versal Adaptive SoC AIE-ML Architecture Manual (AM020)`_ for more details.
168 Per-context Instruction Buffer
169 ------------------------------
178 ------------------------
185 High-level Use Flow
206 11. When ERT reaches end of ``ctrlcode``, it raises an MSI-X to send completion
224 --------
226 Peano is an LLVM based open-source compiler for AMD XDNA Array compute tile
228 https://github.com/Xilinx/llvm-aie
230 The open-source IREE compiler supports graph compilation of ML models for AMD
232 https://github.com/nod-ai/iree-amd-aie
235 ---------------------
237 The open-source XRT runtime stack interfaces with amdxdna kernel driver. XRT
241 The open-source XRT shim for NPU is can be found at:
242 https://github.com/amd/xdna-driver
259 the register states for the partition bound to faulting workload context. The
277 - `AMD XDNA Architecture <https://www.amd.com/en/technologies/xdna.html>`_
278 - `AMD AI Engine Technology <https://www.xilinx.com/products/technology/ai-engine.html>`_
279 - `Peano <https://github.com/Xilinx/llvm-aie>`_
280 - `Versal Adaptive SoC AIE-ML Architecture Manual (AM020) <https://docs.amd.com/r/en-US/am020-versa…
281 - `AI Engine Run Time <https://github.com/Xilinx/aie-rt/tree/release/main_aig>`_