Lines Matching +full:- +full:pl
28 // -----------------------------------------------------------------------------
30 // test/aarch32/config/template-assembler-aarch32.cc.in template file using
34 // -----------------------------------------------------------------------------
37 #include "test-runner.h"
39 #include "test-utils.h"
40 #include "test-utils-aarch32.h"
42 #include "aarch32/assembler-aarch32.h"
43 #include "aarch32/macro-assembler-aarch32.h"
99 {{pl, r3, r3, ROR, r3}, true, pl, "pl r3 r3 ROR r3", "pl_r3_r3_ROR_r3"},
107 {{pl, r3, r3, ASR, r2}, true, pl, "pl r3 r3 ASR r2", "pl_r3_r3_ASR_r2"},
114 {{pl, r2, r2, ASR, r7}, true, pl, "pl r2 r2 ASR r7", "pl_r2_r2_ASR_r7"},
166 {{pl, r3, r3, ASR, r6}, true, pl, "pl r3 r3 ASR r6", "pl_r3_r3_ASR_r6"},
168 {{pl, r3, r3, ASR, r1}, true, pl, "pl r3 r3 ASR r1", "pl_r3_r3_ASR_r1"},
178 {{pl, r6, r6, ASR, r0}, true, pl, "pl r6 r6 ASR r0", "pl_r6_r6_ASR_r0"},
200 {{pl, r0, r0, LSL, r2}, true, pl, "pl r0 r0 LSL r2", "pl_r0_r0_LSL_r2"},
215 {{pl, r7, r7, ASR, r0}, true, pl, "pl r7 r7 ASR r0", "pl_r7_r7_ASR_r0"},
219 {{pl, r6, r6, LSR, r3}, true, pl, "pl r6 r6 LSR r3", "pl_r6_r6_LSR_r3"},
254 {{pl, r4, r4, ASR, r2}, true, pl, "pl r4 r4 ASR r2", "pl_r4_r4_ASR_r2"},
275 {{pl, r7, r7, LSR, r0}, true, pl, "pl r7 r7 LSR r0", "pl_r7_r7_LSR_r0"},
279 {{pl, r2, r2, LSR, r4}, true, pl, "pl r2 r2 LSR r4", "pl_r2_r2_LSR_r4"},
292 {{pl, r3, r3, LSL, r2}, true, pl, "pl r3 r3 LSL r2", "pl_r3_r3_LSL_r2"},
294 {{pl, r6, r6, LSL, r7}, true, pl, "pl r6 r6 LSL r7", "pl_r6_r6_LSL_r7"},
299 {{pl, r7, r7, LSL, r3}, true, pl, "pl r7 r7 LSL r3", "pl_r7_r7_LSL_r3"},
308 {{pl, r6, r6, ROR, r6}, true, pl, "pl r6 r6 ROR r6", "pl_r6_r6_ROR_r6"},
321 {{pl, r1, r1, ROR, r5}, true, pl, "pl r1 r1 ROR r5", "pl_r1_r1_ROR_r5"},
339 {{pl, r5, r5, LSR, r2}, true, pl, "pl r5 r5 LSR r2", "pl_r5_r5_LSR_r2"},
345 {{pl, r5, r5, ROR, r2}, true, pl, "pl r5 r5 ROR r2", "pl_r5_r5_ROR_r2"},
350 {{pl, r7, r7, ASR, r1}, true, pl, "pl r7 r7 ASR r1", "pl_r7_r7_ASR_r1"},
373 {{pl, r3, r3, ASR, r5}, true, pl, "pl r3 r3 ASR r5", "pl_r3_r3_ASR_r5"},
385 {{pl, r3, r3, ASR, r7}, true, pl, "pl r3 r3 ASR r7", "pl_r3_r3_ASR_r7"},
414 {{pl, r7, r7, ROR, r2}, true, pl, "pl r7 r7 ROR r2", "pl_r7_r7_ROR_r2"},
429 {{pl, r0, r0, LSL, r0}, true, pl, "pl r0 r0 LSL r0", "pl_r0_r0_LSL_r0"},
430 {{pl, r4, r4, ROR, r1}, true, pl, "pl r4 r4 ROR r1", "pl_r4_r4_ROR_r1"},
443 {{pl, r1, r1, LSR, r7}, true, pl, "pl r1 r1 LSR r7", "pl_r1_r1_LSR_r7"},
456 {{pl, r1, r1, LSL, r5}, true, pl, "pl r1 r1 LSL r5", "pl_r1_r1_LSL_r5"},
477 {{pl, r1, r1, ASR, r4}, true, pl, "pl r1 r1 ASR r4", "pl_r1_r1_ASR_r4"},
502 {{pl, r0, r0, ASR, r1}, true, pl, "pl r0 r0 ASR r1", "pl_r0_r0_ASR_r1"},
510 {{pl, r5, r5, ASR, r0}, true, pl, "pl r5 r5 ASR r0", "pl_r5_r5_ASR_r0"},
511 {{pl, r1, r1, ROR, r6}, true, pl, "pl r1 r1 ROR r6", "pl_r1_r1_ROR_r6"},
525 {{pl, r5, r5, LSL, r4}, true, pl, "pl r5 r5 LSL r4", "pl_r5_r5_LSL_r4"},
526 {{pl, r0, r0, ROR, r6}, true, pl, "pl r0 r0 ROR r6", "pl_r0_r0_ROR_r6"},
571 {{pl, r6, r6, LSR, r1}, true, pl, "pl r6 r6 LSR r1", "pl_r6_r6_LSR_r1"},
577 {{pl, r4, r4, LSL, r7}, true, pl, "pl r4 r4 LSL r7", "pl_r4_r4_LSL_r7"},
587 {{pl, r5, r5, ROR, r6}, true, pl, "pl r5 r5 ROR r6", "pl_r5_r5_ROR_r6"},
594 {{pl, r5, r5, LSR, r1}, true, pl, "pl r5 r5 LSR r1", "pl_r5_r5_LSR_r1"},
595 {{pl, r3, r3, ROR, r2}, true, pl, "pl r3 r3 ROR r2", "pl_r3_r3_ROR_r2"},
608 {{pl, r6, r6, ASR, r6}, true, pl, "pl r6 r6 ASR r6", "pl_r6_r6_ASR_r6"},
609 {{pl, r6, r6, ROR, r5}, true, pl, "pl r6 r6 ROR r5", "pl_r6_r6_ROR_r5"},
624 {{pl, r0, r0, ASR, r2}, true, pl, "pl r0 r0 ASR r2", "pl_r0_r0_ASR_r2"},
641 {{pl, r4, r4, LSL, r6}, true, pl, "pl r4 r4 LSL r6", "pl_r4_r4_LSL_r6"},
645 {{pl, r1, r1, ROR, r2}, true, pl, "pl r1 r1 ROR r2", "pl_r1_r1_ROR_r2"},
654 {{pl, r0, r0, LSL, r7}, true, pl, "pl r0 r0 LSL r7", "pl_r0_r0_LSL_r7"},
672 {{pl, r3, r3, LSL, r1}, true, pl, "pl r3 r3 LSL r1", "pl_r3_r3_LSL_r1"},
681 {{pl, r4, r4, LSR, r7}, true, pl, "pl r4 r4 LSR r7", "pl_r4_r4_LSR_r7"},
689 {{pl, r3, r3, LSL, r6}, true, pl, "pl r3 r3 LSL r6", "pl_r3_r3_LSL_r6"},
715 {{pl, r7, r7, LSR, r1}, true, pl, "pl r7 r7 LSR r1", "pl_r7_r7_LSR_r1"},
719 {{pl, r0, r0, LSL, r4}, true, pl, "pl r0 r0 LSL r4", "pl_r0_r0_LSL_r4"},
761 {{pl, r2, r2, ASR, r2}, true, pl, "pl r2 r2 ASR r2", "pl_r2_r2_ASR_r2"},
813 {{pl, r0, r0, ASR, r4}, true, pl, "pl r0 r0 ASR r4", "pl_r0_r0_ASR_r4"},
815 {{pl, r2, r2, ASR, r0}, true, pl, "pl r2 r2 ASR r0", "pl_r2_r2_ASR_r0"},
825 {{pl, r5, r5, ROR, r5}, true, pl, "pl r5 r5 ROR r5", "pl_r5_r5_ROR_r5"},
885 {{pl, r2, r2, LSR, r0}, true, pl, "pl r2 r2 LSR r0", "pl_r2_r2_LSR_r0"},
908 {{pl, r1, r1, ROR, r7}, true, pl, "pl r1 r1 ROR r7", "pl_r1_r1_ROR_r7"},
915 {{pl, r7, r7, LSR, r7}, true, pl, "pl r7 r7 LSR r7", "pl_r7_r7_LSR_r7"},
920 {{pl, r1, r1, ROR, r1}, true, pl, "pl r1 r1 ROR r1", "pl_r1_r1_ROR_r1"},
922 {{pl, r4, r4, ROR, r5}, true, pl, "pl r4 r4 ROR r5", "pl_r4_r4_ROR_r5"},
928 {{pl, r3, r3, ROR, r7}, true, pl, "pl r3 r3 ROR r7", "pl_r3_r3_ROR_r7"},
937 {{pl, r0, r0, LSL, r6}, true, pl, "pl r0 r0 LSL r6", "pl_r0_r0_LSL_r6"},
942 {{pl, r2, r2, LSL, r0}, true, pl, "pl r2 r2 LSL r0", "pl_r2_r2_LSL_r0"},
944 {{pl, r5, r5, ASR, r5}, true, pl, "pl r5 r5 ASR r5", "pl_r5_r5_ASR_r5"},
998 {{pl, r5, r5, LSL, r0}, true, pl, "pl r5 r5 LSL r0", "pl_r5_r5_LSL_r0"},
1007 {{pl, r2, r2, ASR, r4}, true, pl, "pl r2 r2 ASR r4", "pl_r2_r2_ASR_r4"},
1019 {{pl, r3, r3, LSL, r5}, true, pl, "pl r3 r3 LSL r5", "pl_r3_r3_LSL_r5"},
1032 {{pl, r1, r1, LSL, r0}, true, pl, "pl r1 r1 LSL r0", "pl_r1_r1_LSL_r0"},
1035 {{pl, r1, r1, LSR, r2}, true, pl, "pl r1 r1 LSR r2", "pl_r1_r1_LSR_r2"},
1055 {{pl, r0, r0, ASR, r7}, true, pl, "pl r0 r0 ASR r7", "pl_r0_r0_ASR_r7"},
1063 {{pl, r6, r6, ASR, r4}, true, pl, "pl r6 r6 ASR r4", "pl_r6_r6_ASR_r4"},
1078 {{pl, r2, r2, LSL, r4}, true, pl, "pl r2 r2 LSL r4", "pl_r2_r2_LSL_r4"},
1086 {{pl, r6, r6, ASR, r5}, true, pl, "pl r6 r6 ASR r5", "pl_r6_r6_ASR_r5"},
1088 {{pl, r0, r0, LSR, r1}, true, pl, "pl r0 r0 LSR r1", "pl_r0_r0_LSR_r1"},
1099 #include "aarch32/traces/assembler-cond-rd-operand-rn-shift-rs-in-it-block-mov-t32.h"
1118 // Values to pass to the macro-assembler. in TestHelper()
1139 masm.GetBuffer()->GetOffsetAddress<const byte*>(start); in TestHelper()
1141 uint32_t result_size = end - start; in TestHelper()
1216 total_error_count - kErrorReportLimit); in TestHelper()